false - Direct mapped cache. true A complex function is used to index the cache, potentially using all address bits.
Fully Associative cache.
true - Cache is not inclusive of lower cache levels. false - Cache is inclusive of lower cache levels.
Write-Back Invalidate/Invalidate. false if WBINVD/INVD from threads sharing this cache acts upon lower level caches for threads sharing this cache. true if WBINVD/INVD is not guaranteed to act upon lower level caches of non-originating threads sharing this cache.
System Coherency Line Size **.
Cache Level (starts at 1).
Maximum number of addressable IDs for processor cores in the physical package **
Maximum number of addressable IDs for logical processors sharing this cache. **
Physical Line partitions **.
Self Initializing cache level (does not need SW initialization).
Cache Type Field.
Ways of associativity **.