1 /** 2 * SSE intrinsics. 3 * https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#techs=SSE 4 * 5 * Copyright: Copyright Guillaume Piolat 2016-2020. 6 * License: $(LINK2 http://www.boost.org/LICENSE_1_0.txt, Boost License 1.0) 7 */ 8 module inteli.xmmintrin; 9 10 public import inteli.types; 11 12 import inteli.internals; 13 14 import inteli.mmx; 15 import inteli.emmintrin; 16 17 import core.stdc.stdlib: malloc, free; 18 import core.stdc.string: memcpy; 19 import core.exception: onOutOfMemoryError; 20 21 version(D_InlineAsm_X86) 22 version = InlineX86Asm; 23 else version(D_InlineAsm_X86_64) 24 version = InlineX86Asm; 25 26 27 // SSE1 28 29 nothrow @nogc: 30 31 32 enum int _MM_EXCEPT_INVALID = 0x0001; /// MXCSR Exception states. 33 enum int _MM_EXCEPT_DENORM = 0x0002; ///ditto 34 enum int _MM_EXCEPT_DIV_ZERO = 0x0004; ///ditto 35 enum int _MM_EXCEPT_OVERFLOW = 0x0008; ///ditto 36 enum int _MM_EXCEPT_UNDERFLOW = 0x0010; ///ditto 37 enum int _MM_EXCEPT_INEXACT = 0x0020; ///ditto 38 enum int _MM_EXCEPT_MASK = 0x003f; /// MXCSR Exception states mask. 39 40 enum int _MM_MASK_INVALID = 0x0080; /// MXCSR Exception masks. 41 enum int _MM_MASK_DENORM = 0x0100; ///ditto 42 enum int _MM_MASK_DIV_ZERO = 0x0200; ///ditto 43 enum int _MM_MASK_OVERFLOW = 0x0400; ///ditto 44 enum int _MM_MASK_UNDERFLOW = 0x0800; ///ditto 45 enum int _MM_MASK_INEXACT = 0x1000; ///ditto 46 enum int _MM_MASK_MASK = 0x1f80; /// MXCSR Exception masks mask. 47 48 enum int _MM_ROUND_NEAREST = 0x0000; /// MXCSR Rounding mode. 49 enum int _MM_ROUND_DOWN = 0x2000; ///ditto 50 enum int _MM_ROUND_UP = 0x4000; ///ditto 51 enum int _MM_ROUND_TOWARD_ZERO = 0x6000; ///ditto 52 enum int _MM_ROUND_MASK = 0x6000; /// MXCSR Rounding mode mask. 53 54 enum int _MM_FLUSH_ZERO_MASK = 0x8000; /// MXCSR Denormal flush to zero mask. 55 enum int _MM_FLUSH_ZERO_ON = 0x8000; /// MXCSR Denormal flush to zero modes. 56 enum int _MM_FLUSH_ZERO_OFF = 0x0000; ///ditto 57 58 /// Add packed single-precision (32-bit) floating-point elements in `a` and `b`. 59 __m128 _mm_add_ps(__m128 a, __m128 b) pure @safe 60 { 61 pragma(inline, true); 62 return a + b; 63 } 64 unittest 65 { 66 __m128 a = [1, 2, 3, 4]; 67 a = _mm_add_ps(a, a); 68 assert(a.array[0] == 2); 69 assert(a.array[1] == 4); 70 assert(a.array[2] == 6); 71 assert(a.array[3] == 8); 72 } 73 74 /// Add the lower single-precision (32-bit) floating-point element 75 /// in `a` and `b`, store the result in the lower element of result, 76 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 77 __m128 _mm_add_ss(__m128 a, __m128 b) pure @safe 78 { 79 static if (GDC_with_SSE) 80 { 81 return __builtin_ia32_addss(a, b); 82 } 83 else static if (DMD_with_DSIMD) 84 { 85 return cast(__m128) __simd(XMM.ADDSS, a, b); 86 } 87 else 88 { 89 a[0] += b[0]; 90 return a; 91 } 92 } 93 unittest 94 { 95 __m128 a = [1, 2, 3, 4]; 96 a = _mm_add_ss(a, a); 97 assert(a.array == [2.0f, 2, 3, 4]); 98 } 99 100 /// Compute the bitwise AND of packed single-precision (32-bit) floating-point elements in `a` and `b`. 101 __m128 _mm_and_ps (__m128 a, __m128 b) pure @safe 102 { 103 pragma(inline, true); 104 return cast(__m128)(cast(__m128i)a & cast(__m128i)b); 105 } 106 unittest 107 { 108 float a = 4.32f; 109 float b = -78.99f; 110 int correct = (*cast(int*)(&a)) & (*cast(int*)(&b)); 111 __m128 A = _mm_set_ps(a, b, a, b); 112 __m128 B = _mm_set_ps(b, a, b, a); 113 int4 R = cast(int4)( _mm_and_ps(A, B) ); 114 assert(R.array[0] == correct); 115 assert(R.array[1] == correct); 116 assert(R.array[2] == correct); 117 assert(R.array[3] == correct); 118 } 119 120 /// Compute the bitwise NOT of packed single-precision (32-bit) floating-point elements in `a` and then AND with `b`. 121 __m128 _mm_andnot_ps (__m128 a, __m128 b) pure @safe 122 { 123 static if (DMD_with_DSIMD) 124 return cast(__m128) __simd(XMM.ANDNPS, a, b); 125 else 126 return cast(__m128)( (~cast(__m128i)a) & cast(__m128i)b ); 127 } 128 unittest 129 { 130 float a = 4.32f; 131 float b = -78.99f; 132 int correct = ~(*cast(int*)(&a)) & (*cast(int*)(&b)); 133 int correct2 = (*cast(int*)(&a)) & ~(*cast(int*)(&b)); 134 __m128 A = _mm_set_ps(a, b, a, b); 135 __m128 B = _mm_set_ps(b, a, b, a); 136 int4 R = cast(int4)( _mm_andnot_ps(A, B) ); 137 assert(R.array[0] == correct2); 138 assert(R.array[1] == correct); 139 assert(R.array[2] == correct2); 140 assert(R.array[3] == correct); 141 } 142 143 /// Average packed unsigned 16-bit integers in ``a` and `b`. 144 __m64 _mm_avg_pu16 (__m64 a, __m64 b) pure @safe 145 { 146 return to_m64(_mm_avg_epu16(to_m128i(a), to_m128i(b))); 147 } 148 149 /// Average packed unsigned 8-bit integers in ``a` and `b`. 150 __m64 _mm_avg_pu8 (__m64 a, __m64 b) pure @safe 151 { 152 return to_m64(_mm_avg_epu8(to_m128i(a), to_m128i(b))); 153 } 154 155 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for equality. 156 __m128 _mm_cmpeq_ps (__m128 a, __m128 b) pure @safe 157 { 158 static if (DMD_with_DSIMD) 159 return cast(__m128) __simd(XMM.CMPPS, a, b, 0); 160 else 161 return cast(__m128) cmpps!(FPComparison.oeq)(a, b); 162 } 163 unittest 164 { 165 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 166 __m128 B = _mm_setr_ps(3.0f, 2.0f, float.nan, float.nan); 167 __m128i R = cast(__m128i) _mm_cmpeq_ps(A, B); 168 int[4] correct = [0, -1, 0, 0]; 169 assert(R.array == correct); 170 } 171 172 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for equality, 173 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 174 __m128 _mm_cmpeq_ss (__m128 a, __m128 b) pure @safe 175 { 176 static if (DMD_with_DSIMD) 177 return cast(__m128) __simd(XMM.CMPSS, a, b, 0); 178 else 179 return cast(__m128) cmpss!(FPComparison.oeq)(a, b); 180 } 181 unittest 182 { 183 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 184 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 185 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 186 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 187 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 188 __m128i R1 = cast(__m128i) _mm_cmpeq_ss(A, B); 189 __m128i R2 = cast(__m128i) _mm_cmpeq_ss(A, C); 190 __m128i R3 = cast(__m128i) _mm_cmpeq_ss(A, D); 191 __m128i R4 = cast(__m128i) _mm_cmpeq_ss(A, E); 192 int[4] correct1 = [-1, 0, 0, 0]; 193 int[4] correct2 = [0, 0, 0, 0]; 194 int[4] correct3 = [0, 0, 0, 0]; 195 int[4] correct4 = [0, 0, 0, 0]; 196 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 197 } 198 199 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for greater-than-or-equal. 200 __m128 _mm_cmpge_ps (__m128 a, __m128 b) pure @safe 201 { 202 static if (DMD_with_DSIMD) 203 return cast(__m128) __simd(XMM.CMPPS, b, a, 2); 204 else 205 return cast(__m128) cmpps!(FPComparison.oge)(a, b); 206 } 207 unittest 208 { 209 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 210 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 211 __m128i R = cast(__m128i) _mm_cmpge_ps(A, B); 212 int[4] correct = [0, -1,-1, 0]; 213 assert(R.array == correct); 214 } 215 216 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for greater-than-or-equal, 217 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 218 __m128 _mm_cmpge_ss (__m128 a, __m128 b) pure @safe 219 { 220 static if (DMD_with_DSIMD) 221 { 222 __m128 c = cast(__m128) __simd(XMM.CMPSS, b, a, 2); 223 a[0] = c[0]; 224 return a; 225 } 226 else 227 return cast(__m128) cmpss!(FPComparison.oge)(a, b); 228 } 229 unittest 230 { 231 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 232 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 233 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 234 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 235 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 236 __m128i R1 = cast(__m128i) _mm_cmpge_ss(A, B); 237 __m128i R2 = cast(__m128i) _mm_cmpge_ss(A, C); 238 __m128i R3 = cast(__m128i) _mm_cmpge_ss(A, D); 239 __m128i R4 = cast(__m128i) _mm_cmpge_ss(A, E); 240 int[4] correct1 = [-1, 0, 0, 0]; 241 int[4] correct2 = [-1, 0, 0, 0]; 242 int[4] correct3 = [0, 0, 0, 0]; 243 int[4] correct4 = [0, 0, 0, 0]; 244 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 245 } 246 247 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for greater-than. 248 __m128 _mm_cmpgt_ps (__m128 a, __m128 b) pure @safe 249 { 250 static if (DMD_with_DSIMD) 251 return cast(__m128) __simd(XMM.CMPPS, b, a, 1); 252 else 253 return cast(__m128) cmpps!(FPComparison.ogt)(a, b); 254 } 255 unittest 256 { 257 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 258 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 259 __m128i R = cast(__m128i) _mm_cmpgt_ps(A, B); 260 int[4] correct = [0, 0,-1, 0]; 261 assert(R.array == correct); 262 } 263 264 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for greater-than, 265 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 266 __m128 _mm_cmpgt_ss (__m128 a, __m128 b) pure @safe 267 { 268 static if (DMD_with_DSIMD) 269 { 270 __m128 c = cast(__m128) __simd(XMM.CMPSS, b, a, 1); 271 a[0] = c[0]; 272 return a; 273 } 274 else 275 return cast(__m128) cmpss!(FPComparison.ogt)(a, b); 276 } 277 unittest 278 { 279 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 280 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 281 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 282 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 283 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 284 __m128i R1 = cast(__m128i) _mm_cmpgt_ss(A, B); 285 __m128i R2 = cast(__m128i) _mm_cmpgt_ss(A, C); 286 __m128i R3 = cast(__m128i) _mm_cmpgt_ss(A, D); 287 __m128i R4 = cast(__m128i) _mm_cmpgt_ss(A, E); 288 int[4] correct1 = [0, 0, 0, 0]; 289 int[4] correct2 = [-1, 0, 0, 0]; 290 int[4] correct3 = [0, 0, 0, 0]; 291 int[4] correct4 = [0, 0, 0, 0]; 292 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 293 } 294 295 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for less-than-or-equal. 296 __m128 _mm_cmple_ps (__m128 a, __m128 b) pure @safe 297 { 298 static if (DMD_with_DSIMD) 299 return cast(__m128) __simd(XMM.CMPPS, a, b, 2); 300 else 301 return cast(__m128) cmpps!(FPComparison.ole)(a, b); 302 } 303 unittest 304 { 305 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 306 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 307 __m128i R = cast(__m128i) _mm_cmple_ps(A, B); 308 int[4] correct = [-1, -1, 0, 0]; 309 assert(R.array == correct); 310 } 311 312 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for less-than-or-equal, 313 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 314 __m128 _mm_cmple_ss (__m128 a, __m128 b) pure @safe 315 { 316 static if (DMD_with_DSIMD) 317 return cast(__m128) __simd(XMM.CMPSS, a, b, 2); 318 else 319 return cast(__m128) cmpss!(FPComparison.ole)(a, b); 320 } 321 unittest 322 { 323 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 324 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 325 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 326 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 327 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 328 __m128i R1 = cast(__m128i) _mm_cmple_ss(A, B); 329 __m128i R2 = cast(__m128i) _mm_cmple_ss(A, C); 330 __m128i R3 = cast(__m128i) _mm_cmple_ss(A, D); 331 __m128i R4 = cast(__m128i) _mm_cmple_ss(A, E); 332 int[4] correct1 = [-1, 0, 0, 0]; 333 int[4] correct2 = [0, 0, 0, 0]; 334 int[4] correct3 = [0, 0, 0, 0]; 335 int[4] correct4 = [-1, 0, 0, 0]; 336 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 337 } 338 339 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for less-than. 340 __m128 _mm_cmplt_ps (__m128 a, __m128 b) pure @safe 341 { 342 static if (DMD_with_DSIMD) 343 return cast(__m128) __simd(XMM.CMPPS, a, b, 1); 344 else 345 return cast(__m128) cmpps!(FPComparison.olt)(a, b); 346 } 347 unittest 348 { 349 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 350 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 351 __m128i R = cast(__m128i) _mm_cmplt_ps(A, B); 352 int[4] correct = [-1, 0, 0, 0]; 353 assert(R.array == correct); 354 } 355 356 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for less-than, 357 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 358 __m128 _mm_cmplt_ss (__m128 a, __m128 b) pure @safe 359 { 360 static if (DMD_with_DSIMD) 361 return cast(__m128) __simd(XMM.CMPSS, a, b, 1); 362 else 363 return cast(__m128) cmpss!(FPComparison.olt)(a, b); 364 } 365 unittest 366 { 367 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 368 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 369 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 370 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 371 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 372 __m128i R1 = cast(__m128i) _mm_cmplt_ss(A, B); 373 __m128i R2 = cast(__m128i) _mm_cmplt_ss(A, C); 374 __m128i R3 = cast(__m128i) _mm_cmplt_ss(A, D); 375 __m128i R4 = cast(__m128i) _mm_cmplt_ss(A, E); 376 int[4] correct1 = [0, 0, 0, 0]; 377 int[4] correct2 = [0, 0, 0, 0]; 378 int[4] correct3 = [0, 0, 0, 0]; 379 int[4] correct4 = [-1, 0, 0, 0]; 380 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 381 } 382 383 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for not-equal. 384 __m128 _mm_cmpneq_ps (__m128 a, __m128 b) pure @safe 385 { 386 static if (DMD_with_DSIMD) 387 return cast(__m128) __simd(XMM.CMPPS, a, b, 4); 388 else 389 return cast(__m128) cmpps!(FPComparison.une)(a, b); 390 } 391 unittest 392 { 393 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 394 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 395 __m128i R = cast(__m128i) _mm_cmpneq_ps(A, B); 396 int[4] correct = [-1, 0, -1, -1]; 397 assert(R.array == correct); 398 } 399 400 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for not-equal, 401 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 402 __m128 _mm_cmpneq_ss (__m128 a, __m128 b) pure @safe 403 { 404 static if (DMD_with_DSIMD) 405 return cast(__m128) __simd(XMM.CMPSS, a, b, 4); 406 else 407 return cast(__m128) cmpss!(FPComparison.une)(a, b); 408 } 409 unittest 410 { 411 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 412 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 413 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 414 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 415 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 416 __m128i R1 = cast(__m128i) _mm_cmpneq_ss(A, B); 417 __m128i R2 = cast(__m128i) _mm_cmpneq_ss(A, C); 418 __m128i R3 = cast(__m128i) _mm_cmpneq_ss(A, D); 419 __m128i R4 = cast(__m128i) _mm_cmpneq_ss(A, E); 420 int[4] correct1 = [0, 0, 0, 0]; 421 int[4] correct2 = [-1, 0, 0, 0]; 422 int[4] correct3 = [-1, 0, 0, 0]; 423 int[4] correct4 = [-1, 0, 0, 0]; 424 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 425 } 426 427 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for not-greater-than-or-equal. 428 __m128 _mm_cmpnge_ps (__m128 a, __m128 b) pure @safe 429 { 430 static if (DMD_with_DSIMD) 431 return cast(__m128) __simd(XMM.CMPPS, b, a, 6); 432 else 433 return cast(__m128) cmpps!(FPComparison.ult)(a, b); 434 } 435 unittest 436 { 437 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 438 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 439 __m128i R = cast(__m128i) _mm_cmpnge_ps(A, B); 440 int[4] correct = [-1, 0, 0, -1]; 441 assert(R.array == correct); 442 } 443 444 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for not-greater-than-or-equal, 445 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 446 __m128 _mm_cmpnge_ss (__m128 a, __m128 b) pure @safe 447 { 448 static if (DMD_with_DSIMD) 449 { 450 __m128 c = cast(__m128) __simd(XMM.CMPSS, b, a, 6); 451 a[0] = c[0]; 452 return a; 453 } 454 else 455 return cast(__m128) cmpss!(FPComparison.ult)(a, b); 456 } 457 unittest 458 { 459 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 460 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 461 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 462 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 463 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 464 __m128i R1 = cast(__m128i) _mm_cmpnge_ss(A, B); 465 __m128i R2 = cast(__m128i) _mm_cmpnge_ss(A, C); 466 __m128i R3 = cast(__m128i) _mm_cmpnge_ss(A, D); 467 __m128i R4 = cast(__m128i) _mm_cmpnge_ss(A, E); 468 int[4] correct1 = [0, 0, 0, 0]; 469 int[4] correct2 = [0, 0, 0, 0]; 470 int[4] correct3 = [-1, 0, 0, 0]; 471 int[4] correct4 = [-1, 0, 0, 0]; 472 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 473 } 474 475 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for not-greater-than. 476 __m128 _mm_cmpngt_ps (__m128 a, __m128 b) pure @safe 477 { 478 static if (DMD_with_DSIMD) 479 return cast(__m128) __simd(XMM.CMPPS, b, a, 5); 480 else 481 return cast(__m128) cmpps!(FPComparison.ule)(a, b); 482 } 483 unittest 484 { 485 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 486 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 487 __m128i R = cast(__m128i) _mm_cmpngt_ps(A, B); 488 int[4] correct = [-1, -1, 0, -1]; 489 assert(R.array == correct); 490 } 491 492 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for not-greater-than, 493 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 494 __m128 _mm_cmpngt_ss (__m128 a, __m128 b) pure @safe 495 { 496 static if (DMD_with_DSIMD) 497 { 498 __m128 c = cast(__m128) __simd(XMM.CMPSS, b, a, 5); 499 a[0] = c[0]; 500 return a; 501 } 502 else 503 return cast(__m128) cmpss!(FPComparison.ule)(a, b); 504 } 505 unittest 506 { 507 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 508 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 509 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 510 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 511 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 512 __m128i R1 = cast(__m128i) _mm_cmpngt_ss(A, B); 513 __m128i R2 = cast(__m128i) _mm_cmpngt_ss(A, C); 514 __m128i R3 = cast(__m128i) _mm_cmpngt_ss(A, D); 515 __m128i R4 = cast(__m128i) _mm_cmpngt_ss(A, E); 516 int[4] correct1 = [-1, 0, 0, 0]; 517 int[4] correct2 = [0, 0, 0, 0]; 518 int[4] correct3 = [-1, 0, 0, 0]; 519 int[4] correct4 = [-1, 0, 0, 0]; 520 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 521 } 522 523 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for not-less-than-or-equal. 524 __m128 _mm_cmpnle_ps (__m128 a, __m128 b) pure @safe 525 { 526 static if (DMD_with_DSIMD) 527 return cast(__m128) __simd(XMM.CMPPS, a, b, 6); 528 else 529 return cast(__m128) cmpps!(FPComparison.ugt)(a, b); 530 } 531 unittest 532 { 533 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 534 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 535 __m128i R = cast(__m128i) _mm_cmpnle_ps(A, B); 536 int[4] correct = [0, 0, -1, -1]; 537 assert(R.array == correct); 538 } 539 540 541 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for not-less-than-or-equal, 542 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 543 __m128 _mm_cmpnle_ss (__m128 a, __m128 b) pure @safe 544 { 545 static if (DMD_with_DSIMD) 546 return cast(__m128) __simd(XMM.CMPSS, a, b, 6); 547 else 548 return cast(__m128) cmpss!(FPComparison.ugt)(a, b); 549 } 550 unittest 551 { 552 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 553 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 554 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 555 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 556 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 557 __m128i R1 = cast(__m128i) _mm_cmpnle_ss(A, B); 558 __m128i R2 = cast(__m128i) _mm_cmpnle_ss(A, C); 559 __m128i R3 = cast(__m128i) _mm_cmpnle_ss(A, D); 560 __m128i R4 = cast(__m128i) _mm_cmpnle_ss(A, E); 561 int[4] correct1 = [0, 0, 0, 0]; 562 int[4] correct2 = [-1, 0, 0, 0]; 563 int[4] correct3 = [-1, 0, 0, 0]; 564 int[4] correct4 = [0, 0, 0, 0]; 565 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 566 } 567 568 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` for not-less-than. 569 __m128 _mm_cmpnlt_ps (__m128 a, __m128 b) pure @safe 570 { 571 static if (DMD_with_DSIMD) 572 return cast(__m128) __simd(XMM.CMPPS, a, b, 5); 573 else 574 return cast(__m128) cmpps!(FPComparison.uge)(a, b); 575 } 576 unittest 577 { 578 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 579 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 580 __m128i R = cast(__m128i) _mm_cmpnlt_ps(A, B); 581 int[4] correct = [0, -1, -1, -1]; 582 assert(R.array == correct); 583 } 584 585 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` for not-less-than, 586 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 587 __m128 _mm_cmpnlt_ss (__m128 a, __m128 b) pure @safe 588 { 589 static if (DMD_with_DSIMD) 590 return cast(__m128) __simd(XMM.CMPSS, a, b, 5); 591 else 592 return cast(__m128) cmpss!(FPComparison.uge)(a, b); 593 } 594 unittest 595 { 596 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 597 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 598 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 599 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 600 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 601 __m128i R1 = cast(__m128i) _mm_cmpnlt_ss(A, B); 602 __m128i R2 = cast(__m128i) _mm_cmpnlt_ss(A, C); 603 __m128i R3 = cast(__m128i) _mm_cmpnlt_ss(A, D); 604 __m128i R4 = cast(__m128i) _mm_cmpnlt_ss(A, E); 605 int[4] correct1 = [-1, 0, 0, 0]; 606 int[4] correct2 = [-1, 0, 0, 0]; 607 int[4] correct3 = [-1, 0, 0, 0]; 608 int[4] correct4 = [0, 0, 0, 0]; 609 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 610 } 611 612 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` to see if neither is NaN. 613 __m128 _mm_cmpord_ps (__m128 a, __m128 b) pure @safe 614 { 615 static if (DMD_with_DSIMD) 616 return cast(__m128) __simd(XMM.CMPPS, a, b, 7); 617 else 618 return cast(__m128) cmpps!(FPComparison.ord)(a, b); 619 } 620 unittest 621 { 622 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 623 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 624 __m128i R = cast(__m128i) _mm_cmpord_ps(A, B); 625 int[4] correct = [-1, -1, -1, 0]; 626 assert(R.array == correct); 627 } 628 629 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` to see if neither is NaN, 630 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 631 __m128 _mm_cmpord_ss (__m128 a, __m128 b) pure @safe 632 { 633 static if (DMD_with_DSIMD) 634 return cast(__m128) __simd(XMM.CMPSS, a, b, 7); 635 else 636 return cast(__m128) cmpss!(FPComparison.ord)(a, b); 637 } 638 unittest 639 { 640 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 641 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 642 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 643 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 644 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 645 __m128i R1 = cast(__m128i) _mm_cmpord_ss(A, B); 646 __m128i R2 = cast(__m128i) _mm_cmpord_ss(A, C); 647 __m128i R3 = cast(__m128i) _mm_cmpord_ss(A, D); 648 __m128i R4 = cast(__m128i) _mm_cmpord_ss(A, E); 649 int[4] correct1 = [-1, 0, 0, 0]; 650 int[4] correct2 = [-1, 0, 0, 0]; 651 int[4] correct3 = [0, 0, 0, 0]; 652 int[4] correct4 = [-1, 0, 0, 0]; 653 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 654 } 655 656 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b` to see if either is NaN. 657 __m128 _mm_cmpunord_ps (__m128 a, __m128 b) pure @safe 658 { 659 static if (DMD_with_DSIMD) 660 return cast(__m128) __simd(XMM.CMPPS, a, b, 3); 661 else 662 return cast(__m128) cmpps!(FPComparison.uno)(a, b); 663 } 664 unittest 665 { 666 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, float.nan); 667 __m128 B = _mm_setr_ps(3.0f, 2.0f, 1.0f, float.nan); 668 __m128i R = cast(__m128i) _mm_cmpunord_ps(A, B); 669 int[4] correct = [0, 0, 0, -1]; 670 assert(R.array == correct); 671 } 672 673 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b` to see if either is NaN. 674 /// and copy the upper 3 packed elements from `a` to the upper elements of result. 675 __m128 _mm_cmpunord_ss (__m128 a, __m128 b) pure @safe 676 { 677 static if (DMD_with_DSIMD) 678 return cast(__m128) __simd(XMM.CMPSS, a, b, 3); 679 else return cast(__m128) cmpss!(FPComparison.uno)(a, b); 680 } 681 unittest 682 { 683 __m128 A = _mm_setr_ps(3.0f, 0, 0, 0); 684 __m128 B = _mm_setr_ps(3.0f, float.nan, float.nan, float.nan); 685 __m128 C = _mm_setr_ps(2.0f, float.nan, float.nan, float.nan); 686 __m128 D = _mm_setr_ps(float.nan, float.nan, float.nan, float.nan); 687 __m128 E = _mm_setr_ps(4.0f, float.nan, float.nan, float.nan); 688 __m128i R1 = cast(__m128i) _mm_cmpunord_ss(A, B); 689 __m128i R2 = cast(__m128i) _mm_cmpunord_ss(A, C); 690 __m128i R3 = cast(__m128i) _mm_cmpunord_ss(A, D); 691 __m128i R4 = cast(__m128i) _mm_cmpunord_ss(A, E); 692 int[4] correct1 = [0, 0, 0, 0]; 693 int[4] correct2 = [0, 0, 0, 0]; 694 int[4] correct3 = [-1, 0, 0, 0]; 695 int[4] correct4 = [0, 0, 0, 0]; 696 assert(R1.array == correct1 && R2.array == correct2 && R3.array == correct3 && R4.array == correct4); 697 } 698 699 700 /// Compare the lower single-precision (32-bit) floating-point element in `a` and `b` for equality, 701 /// and return the boolean result (0 or 1). 702 int _mm_comieq_ss (__m128 a, __m128 b) pure @safe 703 { 704 return a.array[0] == b.array[0]; 705 } 706 unittest 707 { 708 assert(1 == _mm_comieq_ss(_mm_set_ss(78.0f), _mm_set_ss(78.0f))); 709 assert(0 == _mm_comieq_ss(_mm_set_ss(78.0f), _mm_set_ss(-78.0f))); 710 assert(0 == _mm_comieq_ss(_mm_set_ss(78.0f), _mm_set_ss(float.nan))); 711 assert(0 == _mm_comieq_ss(_mm_set_ss(float.nan), _mm_set_ss(-4.22f))); 712 assert(1 == _mm_comieq_ss(_mm_set_ss(0.0), _mm_set_ss(-0.0))); 713 } 714 715 /// Compare the lower single-precision (32-bit) floating-point element in `a` and `b` for greater-than-or-equal, 716 /// and return the boolean result (0 or 1). 717 int _mm_comige_ss (__m128 a, __m128 b) pure @safe 718 { 719 return a.array[0] >= b.array[0]; 720 } 721 unittest 722 { 723 assert(1 == _mm_comige_ss(_mm_set_ss(78.0f), _mm_set_ss(78.0f))); 724 assert(1 == _mm_comige_ss(_mm_set_ss(78.0f), _mm_set_ss(-78.0f))); 725 assert(0 == _mm_comige_ss(_mm_set_ss(-78.0f), _mm_set_ss(78.0f))); 726 assert(0 == _mm_comige_ss(_mm_set_ss(78.0f), _mm_set_ss(float.nan))); 727 assert(0 == _mm_comige_ss(_mm_set_ss(float.nan), _mm_set_ss(-4.22f))); 728 assert(1 == _mm_comige_ss(_mm_set_ss(-0.0f), _mm_set_ss(0.0f))); 729 } 730 731 /// Compare the lower single-precision (32-bit) floating-point element in `a` and `b` for greater-than, 732 /// and return the boolean result (0 or 1). 733 int _mm_comigt_ss (__m128 a, __m128 b) pure @safe // comiss + seta 734 { 735 return a.array[0] > b.array[0]; 736 } 737 unittest 738 { 739 assert(0 == _mm_comigt_ss(_mm_set_ss(78.0f), _mm_set_ss(78.0f))); 740 assert(1 == _mm_comigt_ss(_mm_set_ss(78.0f), _mm_set_ss(-78.0f))); 741 assert(0 == _mm_comigt_ss(_mm_set_ss(78.0f), _mm_set_ss(float.nan))); 742 assert(0 == _mm_comigt_ss(_mm_set_ss(float.nan), _mm_set_ss(-4.22f))); 743 assert(0 == _mm_comigt_ss(_mm_set_ss(0.0f), _mm_set_ss(-0.0f))); 744 } 745 746 /// Compare the lower single-precision (32-bit) floating-point element in `a` and `b` for less-than-or-equal, 747 /// and return the boolean result (0 or 1). 748 int _mm_comile_ss (__m128 a, __m128 b) pure @safe // comiss + setbe 749 { 750 return a.array[0] <= b.array[0]; 751 } 752 unittest 753 { 754 assert(1 == _mm_comile_ss(_mm_set_ss(78.0f), _mm_set_ss(78.0f))); 755 assert(0 == _mm_comile_ss(_mm_set_ss(78.0f), _mm_set_ss(-78.0f))); 756 assert(1 == _mm_comile_ss(_mm_set_ss(-78.0f), _mm_set_ss(78.0f))); 757 assert(0 == _mm_comile_ss(_mm_set_ss(78.0f), _mm_set_ss(float.nan))); 758 assert(0 == _mm_comile_ss(_mm_set_ss(float.nan), _mm_set_ss(-4.22f))); 759 assert(1 == _mm_comile_ss(_mm_set_ss(0.0f), _mm_set_ss(-0.0f))); 760 } 761 762 /// Compare the lower single-precision (32-bit) floating-point element in `a` and `b` for less-than, 763 /// and return the boolean result (0 or 1). 764 int _mm_comilt_ss (__m128 a, __m128 b) pure @safe // comiss + setb 765 { 766 return a.array[0] < b.array[0]; 767 } 768 unittest 769 { 770 assert(0 == _mm_comilt_ss(_mm_set_ss(78.0f), _mm_set_ss(78.0f))); 771 assert(0 == _mm_comilt_ss(_mm_set_ss(78.0f), _mm_set_ss(-78.0f))); 772 assert(1 == _mm_comilt_ss(_mm_set_ss(-78.0f), _mm_set_ss(78.0f))); 773 assert(0 == _mm_comilt_ss(_mm_set_ss(78.0f), _mm_set_ss(float.nan))); 774 assert(0 == _mm_comilt_ss(_mm_set_ss(float.nan), _mm_set_ss(-4.22f))); 775 assert(0 == _mm_comilt_ss(_mm_set_ss(-0.0f), _mm_set_ss(0.0f))); 776 } 777 778 /// Compare the lower single-precision (32-bit) floating-point element in `a` and `b` for not-equal, 779 /// and return the boolean result (0 or 1). 780 int _mm_comineq_ss (__m128 a, __m128 b) pure @safe // comiss + setne 781 { 782 return a.array[0] != b.array[0]; 783 } 784 unittest 785 { 786 assert(0 == _mm_comineq_ss(_mm_set_ss(78.0f), _mm_set_ss(78.0f))); 787 assert(1 == _mm_comineq_ss(_mm_set_ss(78.0f), _mm_set_ss(-78.0f))); 788 assert(1 == _mm_comineq_ss(_mm_set_ss(78.0f), _mm_set_ss(float.nan))); 789 assert(1 == _mm_comineq_ss(_mm_set_ss(float.nan), _mm_set_ss(-4.22f))); 790 assert(0 == _mm_comineq_ss(_mm_set_ss(0.0f), _mm_set_ss(-0.0f))); 791 } 792 793 /// Convert packed signed 32-bit integers in `b` to packed single-precision (32-bit) 794 /// floating-point elements, store the results in the lower 2 elements, 795 /// and copy the upper 2 packed elements from `a` to the upper elements of result. 796 alias _mm_cvt_pi2ps = _mm_cvtpi32_ps; 797 798 /// Convert 2 lower packed single-precision (32-bit) floating-point elements in `a` 799 /// to packed 32-bit integers. 800 __m64 _mm_cvt_ps2pi (__m128 a) @safe 801 { 802 return to_m64(_mm_cvtps_epi32(a)); 803 } 804 805 /// Convert the signed 32-bit integer `b` to a single-precision (32-bit) floating-point element, 806 /// store the result in the lower element, and copy the upper 3 packed elements from `a` to the 807 /// upper elements of the result. 808 __m128 _mm_cvt_si2ss (__m128 v, int x) pure @trusted 809 { 810 v.ptr[0] = cast(float)x; 811 return v; 812 } 813 unittest 814 { 815 __m128 a = _mm_cvt_si2ss(_mm_set1_ps(0.0f), 42); 816 assert(a.array == [42f, 0, 0, 0]); 817 } 818 819 /// Convert packed 16-bit integers in `a` to packed single-precision (32-bit) floating-point elements. 820 __m128 _mm_cvtpi16_ps (__m64 a) pure @safe 821 { 822 __m128i ma = to_m128i(a); 823 ma = _mm_unpacklo_epi16(ma, _mm_setzero_si128()); // Zero-extend to 32-bit 824 ma = _mm_srai_epi32(_mm_slli_epi32(ma, 16), 16); // Replicate sign bit 825 return _mm_cvtepi32_ps(ma); 826 } 827 unittest 828 { 829 __m64 A = _mm_setr_pi16(-1, 2, -3, 4); 830 __m128 R = _mm_cvtpi16_ps(A); 831 float[4] correct = [-1.0f, 2.0f, -3.0f, 4.0f]; 832 assert(R.array == correct); 833 } 834 835 /// Convert packed signed 32-bit integers in `b` to packed single-precision (32-bit) 836 /// floating-point elements, store the results in the lower 2 elements, 837 /// and copy the upper 2 packed elements from `a` to the upper elements of result. 838 __m128 _mm_cvtpi32_ps (__m128 a, __m64 b) pure @trusted 839 { 840 __m128 fb = _mm_cvtepi32_ps(to_m128i(b)); 841 a.ptr[0] = fb.array[0]; 842 a.ptr[1] = fb.array[1]; 843 return a; 844 } 845 unittest 846 { 847 __m128 R = _mm_cvtpi32_ps(_mm_set1_ps(4.0f), _mm_setr_pi32(1, 2)); 848 float[4] correct = [1.0f, 2.0f, 4.0f, 4.0f]; 849 assert(R.array == correct); 850 } 851 852 /// Convert packed signed 32-bit integers in `a` to packed single-precision (32-bit) floating-point elements, 853 /// store the results in the lower 2 elements, then covert the packed signed 32-bit integers in `b` to 854 /// single-precision (32-bit) floating-point element, and store the results in the upper 2 elements. 855 __m128 _mm_cvtpi32x2_ps (__m64 a, __m64 b) pure @trusted 856 { 857 long2 l; 858 l.ptr[0] = a.array[0]; 859 l.ptr[1] = b.array[0]; 860 return _mm_cvtepi32_ps(cast(__m128i)l); 861 } 862 unittest 863 { 864 __m64 A = _mm_setr_pi32(-45, 128); 865 __m64 B = _mm_setr_pi32(0, 1000); 866 __m128 R = _mm_cvtpi32x2_ps(A, B); 867 float[4] correct = [-45.0f, 128.0f, 0.0f, 1000.0f]; 868 assert(R.array == correct); 869 } 870 871 /// Convert the lower packed 8-bit integers in `a` to packed single-precision (32-bit) floating-point elements. 872 __m128 _mm_cvtpi8_ps (__m64 a) pure @safe 873 { 874 __m128i b = to_m128i(a); 875 876 // Zero extend to 32-bit 877 b = _mm_unpacklo_epi8(b, _mm_setzero_si128()); 878 b = _mm_unpacklo_epi16(b, _mm_setzero_si128()); 879 880 // Replicate sign bit 881 b = _mm_srai_epi32(_mm_slli_epi32(b, 24), 24); // Replicate sign bit 882 return _mm_cvtepi32_ps(b); 883 } 884 unittest 885 { 886 __m64 A = _mm_setr_pi8(-1, 2, -3, 4, 0, 0, 0, 0); 887 __m128 R = _mm_cvtpi8_ps(A); 888 float[4] correct = [-1.0f, 2.0f, -3.0f, 4.0f]; 889 assert(R.array == correct); 890 } 891 892 /// Convert packed single-precision (32-bit) floating-point elements in `a` to packed 16-bit integers. 893 /// Note: this intrinsic will generate 0x7FFF, rather than 0x8000, for input values between 0x7FFF and 0x7FFFFFFF. 894 __m64 _mm_cvtps_pi16 (__m128 a) @safe 895 { 896 // The C++ version of this intrinsic convert to 32-bit float, then use packssdw 897 // Which means the 16-bit integers should be saturated 898 __m128i b = _mm_cvtps_epi32(a); 899 b = _mm_packs_epi32(b, b); 900 return to_m64(b); 901 } 902 unittest 903 { 904 __m128 A = _mm_setr_ps(-1.0f, 2.0f, -33000.0f, 70000.0f); 905 short4 R = cast(short4) _mm_cvtps_pi16(A); 906 short[4] correct = [-1, 2, -32768, 32767]; 907 assert(R.array == correct); 908 } 909 910 /// Convert packed single-precision (32-bit) floating-point elements in `a` to packed 32-bit integers. 911 __m64 _mm_cvtps_pi32 (__m128 a) @safe 912 { 913 return to_m64(_mm_cvtps_epi32(a)); 914 } 915 unittest 916 { 917 __m128 A = _mm_setr_ps(-33000.0f, 70000.0f, -1.0f, 2.0f, ); 918 int2 R = cast(int2) _mm_cvtps_pi32(A); 919 int[2] correct = [-33000, 70000]; 920 assert(R.array == correct); 921 } 922 923 /// Convert packed single-precision (32-bit) floating-point elements in `a` to packed 8-bit integers, 924 /// and store the results in lower 4 elements. 925 /// Note: this intrinsic will generate 0x7F, rather than 0x80, for input values between 0x7F and 0x7FFFFFFF. 926 __m64 _mm_cvtps_pi8 (__m128 a) @safe 927 { 928 // The C++ version of this intrinsic convert to 32-bit float, then use packssdw + packsswb 929 // Which means the 8-bit integers should be saturated 930 __m128i b = _mm_cvtps_epi32(a); 931 b = _mm_packs_epi32(b, _mm_setzero_si128()); 932 b = _mm_packs_epi16(b, _mm_setzero_si128()); 933 return to_m64(b); 934 } 935 unittest 936 { 937 __m128 A = _mm_setr_ps(-1.0f, 2.0f, -129.0f, 128.0f); 938 byte8 R = cast(byte8) _mm_cvtps_pi8(A); 939 byte[8] correct = [-1, 2, -128, 127, 0, 0, 0, 0]; 940 assert(R.array == correct); 941 } 942 943 /// Convert packed unsigned 16-bit integers in `a` to packed single-precision (32-bit) floating-point elements. 944 __m128 _mm_cvtpu16_ps (__m64 a) pure @safe 945 { 946 __m128i ma = to_m128i(a); 947 ma = _mm_unpacklo_epi16(ma, _mm_setzero_si128()); // Zero-extend to 32-bit 948 return _mm_cvtepi32_ps(ma); 949 } 950 unittest 951 { 952 __m64 A = _mm_setr_pi16(-1, 2, -3, 4); 953 __m128 R = _mm_cvtpu16_ps(A); 954 float[4] correct = [65535.0f, 2.0f, 65533.0f, 4.0f]; 955 assert(R.array == correct); 956 } 957 958 /// Convert the lower packed unsigned 8-bit integers in `a` to packed single-precision (32-bit) floating-point element. 959 __m128 _mm_cvtpu8_ps (__m64 a) pure @safe 960 { 961 __m128i b = to_m128i(a); 962 963 // Zero extend to 32-bit 964 b = _mm_unpacklo_epi8(b, _mm_setzero_si128()); 965 b = _mm_unpacklo_epi16(b, _mm_setzero_si128()); 966 return _mm_cvtepi32_ps(b); 967 } 968 unittest 969 { 970 __m64 A = _mm_setr_pi8(-1, 2, -3, 4, 0, 0, 0, 0); 971 __m128 R = _mm_cvtpu8_ps(A); 972 float[4] correct = [255.0f, 2.0f, 253.0f, 4.0f]; 973 assert(R.array == correct); 974 } 975 976 /// Convert the signed 32-bit integer `b` to a single-precision (32-bit) floating-point element, 977 /// store the result in the lower element, and copy the upper 3 packed elements from `a` to the 978 /// upper elements of result. 979 __m128 _mm_cvtsi32_ss(__m128 v, int x) pure @trusted 980 { 981 v.ptr[0] = cast(float)x; 982 return v; 983 } 984 unittest 985 { 986 __m128 a = _mm_cvtsi32_ss(_mm_set1_ps(0.0f), 42); 987 assert(a.array == [42.0f, 0, 0, 0]); 988 } 989 990 991 /// Convert the signed 64-bit integer `b` to a single-precision (32-bit) floating-point element, 992 /// store the result in the lower element, and copy the upper 3 packed elements from `a` to the 993 /// upper elements of result. 994 __m128 _mm_cvtsi64_ss(__m128 v, long x) pure @trusted 995 { 996 v.ptr[0] = cast(float)x; 997 return v; 998 } 999 unittest 1000 { 1001 __m128 a = _mm_cvtsi64_ss(_mm_set1_ps(0.0f), 42); 1002 assert(a.array == [42.0f, 0, 0, 0]); 1003 } 1004 1005 /// Take the lower single-precision (32-bit) floating-point element of `a`. 1006 float _mm_cvtss_f32(__m128 a) pure @safe 1007 { 1008 return a.array[0]; 1009 } 1010 1011 /// Convert the lower single-precision (32-bit) floating-point element in `a` to a 32-bit integer. 1012 int _mm_cvtss_si32 (__m128 a) @safe // PERF GDC 1013 { 1014 static if (GDC_with_SSE) 1015 { 1016 return __builtin_ia32_cvtss2si(a); 1017 } 1018 else static if (LDC_with_SSE) 1019 { 1020 return __builtin_ia32_cvtss2si(a); 1021 } 1022 else static if (DMD_with_DSIMD) 1023 { 1024 __m128 b; 1025 __m128i r = cast(__m128i) __simd(XMM.CVTPS2DQ, a); // Note: converts 4 integers. 1026 return r.array[0]; 1027 } 1028 else 1029 { 1030 return convertFloatToInt32UsingMXCSR(a.array[0]); 1031 } 1032 } 1033 unittest 1034 { 1035 assert(1 == _mm_cvtss_si32(_mm_setr_ps(1.0f, 2.0f, 3.0f, 4.0f))); 1036 } 1037 1038 /// Convert the lower single-precision (32-bit) floating-point element in `a` to a 64-bit integer. 1039 long _mm_cvtss_si64 (__m128 a) @safe 1040 { 1041 static if (LDC_with_SSE2) 1042 { 1043 version(X86_64) 1044 { 1045 return __builtin_ia32_cvtss2si64(a); 1046 } 1047 else 1048 { 1049 // Note: In 32-bit x86, there is no way to convert from float/double to 64-bit integer 1050 // using SSE instructions only. So the builtin doesn't exit for this arch. 1051 return convertFloatToInt64UsingMXCSR(a.array[0]); 1052 } 1053 } 1054 else 1055 { 1056 return convertFloatToInt64UsingMXCSR(a.array[0]); 1057 } 1058 } 1059 unittest 1060 { 1061 assert(1 == _mm_cvtss_si64(_mm_setr_ps(1.0f, 2.0f, 3.0f, 4.0f))); 1062 1063 uint savedRounding = _MM_GET_ROUNDING_MODE(); 1064 1065 _MM_SET_ROUNDING_MODE(_MM_ROUND_NEAREST); 1066 assert(-86186 == _mm_cvtss_si64(_mm_set1_ps(-86186.49f))); 1067 1068 _MM_SET_ROUNDING_MODE(_MM_ROUND_DOWN); 1069 assert(-86187 == _mm_cvtss_si64(_mm_set1_ps(-86186.1f))); 1070 1071 _MM_SET_ROUNDING_MODE(_MM_ROUND_UP); 1072 assert(86187 == _mm_cvtss_si64(_mm_set1_ps(86186.1f))); 1073 1074 _MM_SET_ROUNDING_MODE(_MM_ROUND_TOWARD_ZERO); 1075 assert(-86186 == _mm_cvtss_si64(_mm_set1_ps(-86186.9f))); 1076 1077 _MM_SET_ROUNDING_MODE(savedRounding); 1078 } 1079 1080 1081 /// Convert the lower single-precision (32-bit) floating-point element in `a` to a 32-bit 1082 /// integer with truncation. 1083 int _mm_cvtt_ss2si (__m128 a) pure @safe 1084 { 1085 // x86: cvttss2si always generated, even in -O0 1086 return cast(int)(a.array[0]); 1087 } 1088 alias _mm_cvttss_si32 = _mm_cvtt_ss2si; ///ditto 1089 unittest 1090 { 1091 assert(1 == _mm_cvtt_ss2si(_mm_setr_ps(1.9f, 2.0f, 3.0f, 4.0f))); 1092 } 1093 1094 1095 /// Convert packed single-precision (32-bit) floating-point elements in `a` to packed 32-bit 1096 /// integers with truncation. 1097 __m64 _mm_cvtt_ps2pi (__m128 a) pure @safe 1098 { 1099 return to_m64(_mm_cvttps_epi32(a)); 1100 } 1101 1102 /// Convert the lower single-precision (32-bit) floating-point element in `a` to a 64-bit 1103 /// integer with truncation. 1104 long _mm_cvttss_si64 (__m128 a) pure @safe 1105 { 1106 return cast(long)(a.array[0]); 1107 } 1108 unittest 1109 { 1110 assert(1 == _mm_cvttss_si64(_mm_setr_ps(1.9f, 2.0f, 3.0f, 4.0f))); 1111 } 1112 1113 /// Divide packed single-precision (32-bit) floating-point elements in `a` by packed elements in `b`. 1114 __m128 _mm_div_ps(__m128 a, __m128 b) pure @safe 1115 { 1116 pragma(inline, true); 1117 return a / b; 1118 } 1119 unittest 1120 { 1121 __m128 a = [1.5f, -2.0f, 3.0f, 1.0f]; 1122 a = _mm_div_ps(a, a); 1123 float[4] correct = [1.0f, 1.0f, 1.0f, 1.0f]; 1124 assert(a.array == correct); 1125 } 1126 1127 /// Divide the lower single-precision (32-bit) floating-point element in `a` by the lower 1128 /// single-precision (32-bit) floating-point element in `b`, store the result in the lower 1129 /// element of result, and copy the upper 3 packed elements from `a` to the upper elements of result. 1130 __m128 _mm_div_ss(__m128 a, __m128 b) pure @safe 1131 { 1132 static if (DMD_with_DSIMD) 1133 return cast(__m128) __simd(XMM.DIVSS, a, b); 1134 else static if (GDC_with_SSE) 1135 return __builtin_ia32_divss(a, b); 1136 else 1137 { 1138 a[0] /= b[0]; 1139 return a; 1140 } 1141 } 1142 unittest 1143 { 1144 __m128 a = [1.5f, -2.0f, 3.0f, 1.0f]; 1145 a = _mm_div_ss(a, a); 1146 float[4] correct = [1.0f, -2.0, 3.0f, 1.0f]; 1147 assert(a.array == correct); 1148 } 1149 1150 /// Extract a 16-bit unsigned integer from `a`, selected with `imm8`. Zero-extended. 1151 int _mm_extract_pi16 (__m64 a, int imm8) 1152 { 1153 short4 sa = cast(short4)a; 1154 return cast(ushort)(sa.array[imm8]); 1155 } 1156 unittest 1157 { 1158 __m64 A = _mm_setr_pi16(-1, 6, 0, 4); 1159 assert(_mm_extract_pi16(A, 0) == 65535); 1160 assert(_mm_extract_pi16(A, 1) == 6); 1161 assert(_mm_extract_pi16(A, 2) == 0); 1162 assert(_mm_extract_pi16(A, 3) == 4); 1163 } 1164 1165 /// Free aligned memory that was allocated with `_mm_malloc` or `_mm_realloc`. 1166 void _mm_free(void * mem_addr) @trusted 1167 { 1168 // support for free(NULL) 1169 if (mem_addr is null) 1170 return; 1171 1172 // Technically we don't need to store size and alignement in the chunk, but we do in case we 1173 // have to implement _mm_realloc 1174 1175 size_t pointerSize = (void*).sizeof; 1176 void** rawLocation = cast(void**)(cast(char*)mem_addr - size_t.sizeof); 1177 size_t* alignmentLocation = cast(size_t*)(cast(char*)mem_addr - 3 * pointerSize); 1178 size_t alignment = *alignmentLocation; 1179 assert(alignment != 0); 1180 assert(isPointerAligned(mem_addr, alignment)); 1181 free(*rawLocation); 1182 } 1183 1184 /// Get the exception mask bits from the MXCSR control and status register. 1185 /// The exception mask may contain any of the following flags: `_MM_MASK_INVALID`, 1186 /// `_MM_MASK_DIV_ZERO`, `_MM_MASK_DENORM`, `_MM_MASK_OVERFLOW`, `_MM_MASK_UNDERFLOW`, `_MM_MASK_INEXACT`. 1187 /// Note: won't correspond to reality on non-x86, where MXCSR this is emulated. 1188 uint _MM_GET_EXCEPTION_MASK() @safe 1189 { 1190 return _mm_getcsr() & _MM_MASK_MASK; 1191 } 1192 1193 /// Get the exception state bits from the MXCSR control and status register. 1194 /// The exception state may contain any of the following flags: `_MM_EXCEPT_INVALID`, 1195 /// `_MM_EXCEPT_DIV_ZERO`, `_MM_EXCEPT_DENORM`, `_MM_EXCEPT_OVERFLOW`, `_MM_EXCEPT_UNDERFLOW`, `_MM_EXCEPT_INEXACT`. 1196 /// Note: won't correspond to reality on non-x86, where MXCSR this is emulated. No exception reported. 1197 uint _MM_GET_EXCEPTION_STATE() @safe 1198 { 1199 return _mm_getcsr() & _MM_EXCEPT_MASK; 1200 } 1201 1202 /// Get the flush zero bits from the MXCSR control and status register. 1203 /// The flush zero may contain any of the following flags: `_MM_FLUSH_ZERO_ON` or `_MM_FLUSH_ZERO_OFF` 1204 uint _MM_GET_FLUSH_ZERO_MODE() @safe 1205 { 1206 return _mm_getcsr() & _MM_FLUSH_ZERO_MASK; 1207 } 1208 1209 /// Get the rounding mode bits from the MXCSR control and status register. The rounding mode may 1210 /// contain any of the following flags: `_MM_ROUND_NEAREST, `_MM_ROUND_DOWN`, `_MM_ROUND_UP`, `_MM_ROUND_TOWARD_ZERO`. 1211 uint _MM_GET_ROUNDING_MODE() @safe 1212 { 1213 return _mm_getcsr() & _MM_ROUND_MASK; 1214 } 1215 1216 /// Get the unsigned 32-bit value of the MXCSR control and status register. 1217 /// Note: this is emulated on ARM, because there is no MXCSR register then. 1218 uint _mm_getcsr() @trusted 1219 { 1220 static if (LDC_with_ARM) 1221 { 1222 // Note: we convert the ARM FPSCR into a x86 SSE control word. 1223 // However, only rounding mode and flush to zero are actually set. 1224 // The returned control word will have all exceptions masked, and no exception detected. 1225 1226 uint fpscr = arm_get_fpcr(); 1227 1228 uint cw = 0; // No exception detected 1229 if (fpscr & _MM_FLUSH_ZERO_MASK_ARM) 1230 { 1231 // ARM has one single flag for ARM. 1232 // It does both x86 bits. 1233 // https://developer.arm.com/documentation/dui0473/c/neon-and-vfp-programming/the-effects-of-using-flush-to-zero-mode 1234 cw |= _MM_FLUSH_ZERO_ON; 1235 cw |= 0x40; // set "denormals are zeros" 1236 } 1237 cw |= _MM_MASK_MASK; // All exception maske 1238 1239 // Rounding mode 1240 switch(fpscr & _MM_ROUND_MASK_ARM) 1241 { 1242 default: 1243 case _MM_ROUND_NEAREST_ARM: cw |= _MM_ROUND_NEAREST; break; 1244 case _MM_ROUND_DOWN_ARM: cw |= _MM_ROUND_DOWN; break; 1245 case _MM_ROUND_UP_ARM: cw |= _MM_ROUND_UP; break; 1246 case _MM_ROUND_TOWARD_ZERO_ARM: cw |= _MM_ROUND_TOWARD_ZERO; break; 1247 } 1248 return cw; 1249 } 1250 else version(GNU) 1251 { 1252 static if (GDC_with_SSE) 1253 { 1254 return __builtin_ia32_stmxcsr(); 1255 } 1256 else version(X86) 1257 { 1258 uint sseRounding = 0; 1259 asm pure nothrow @nogc @trusted 1260 { 1261 "stmxcsr %0;\n" 1262 : "=m" (sseRounding) 1263 : 1264 : ; 1265 } 1266 return sseRounding; 1267 } 1268 else 1269 static assert(false); 1270 } 1271 else version (InlineX86Asm) 1272 { 1273 uint controlWord; 1274 asm nothrow @nogc pure @trusted 1275 { 1276 stmxcsr controlWord; 1277 } 1278 return controlWord; 1279 } 1280 else 1281 static assert(0, "Not yet supported"); 1282 } 1283 unittest 1284 { 1285 uint csr = _mm_getcsr(); 1286 } 1287 1288 /// Insert a 16-bit integer `i` inside `a` at the location specified by `imm8`. 1289 __m64 _mm_insert_pi16 (__m64 v, int i, int imm8) pure @trusted 1290 { 1291 short4 r = cast(short4)v; 1292 r.ptr[imm8 & 3] = cast(short)i; 1293 return cast(__m64)r; 1294 } 1295 unittest 1296 { 1297 __m64 A = _mm_set_pi16(3, 2, 1, 0); 1298 short4 R = cast(short4) _mm_insert_pi16(A, 42, 1 | 4); 1299 short[4] correct = [0, 42, 2, 3]; 1300 assert(R.array == correct); 1301 } 1302 1303 /// Load 128-bits (composed of 4 packed single-precision (32-bit) floating-point elements) from memory. 1304 // `p` must be aligned on a 16-byte boundary or a general-protection exception may be generated. 1305 __m128 _mm_load_ps(const(float)*p) pure @trusted // FUTURE shouldn't be trusted, see #62 1306 { 1307 pragma(inline, true); 1308 return *cast(__m128*)p; 1309 } 1310 unittest 1311 { 1312 static immutable align(16) float[4] correct = [1.0f, 2.0f, 3.0f, 4.0f]; 1313 __m128 A = _mm_load_ps(correct.ptr); 1314 assert(A.array == correct); 1315 } 1316 1317 /// Load a single-precision (32-bit) floating-point element from memory into all elements. 1318 __m128 _mm_load_ps1(const(float)*p) pure @trusted 1319 { 1320 return __m128(*p); 1321 } 1322 unittest 1323 { 1324 float n = 2.5f; 1325 float[4] correct = [2.5f, 2.5f, 2.5f, 2.5f]; 1326 __m128 A = _mm_load_ps1(&n); 1327 assert(A.array == correct); 1328 } 1329 1330 /// Load a single-precision (32-bit) floating-point element from memory into the lower of dst, and zero the upper 3 1331 /// elements. `mem_addr` does not need to be aligned on any particular boundary. 1332 __m128 _mm_load_ss (const(float)* mem_addr) pure @trusted 1333 { 1334 pragma(inline, true); 1335 static if (DMD_with_DSIMD) 1336 { 1337 return cast(__m128)__simd(XMM.LODSS, *cast(__m128*)mem_addr); 1338 } 1339 else 1340 { 1341 __m128 r; // PERf =void; 1342 r.ptr[0] = *mem_addr; 1343 r.ptr[1] = 0; 1344 r.ptr[2] = 0; 1345 r.ptr[3] = 0; 1346 return r; 1347 } 1348 } 1349 unittest 1350 { 1351 float n = 2.5f; 1352 float[4] correct = [2.5f, 0.0f, 0.0f, 0.0f]; 1353 __m128 A = _mm_load_ss(&n); 1354 assert(A.array == correct); 1355 } 1356 1357 /// Load a single-precision (32-bit) floating-point element from memory into all elements. 1358 alias _mm_load1_ps = _mm_load_ps1; 1359 1360 /// Load 2 single-precision (32-bit) floating-point elements from memory into the upper 2 elements of result, 1361 /// and copy the lower 2 elements from `a` to result. `mem_addr does` not need to be aligned on any particular boundary. 1362 __m128 _mm_loadh_pi (__m128 a, const(__m64)* mem_addr) pure @trusted 1363 { 1364 pragma(inline, true); 1365 static if (DMD_with_DSIMD) 1366 { 1367 return cast(__m128) __simd(XMM.LODHPS, a, *cast(const(__m128)*)mem_addr); 1368 } 1369 else 1370 { 1371 // x86: movlhps generated since LDC 1.9.0 -O1 1372 long2 la = cast(long2)a; 1373 la.ptr[1] = (*mem_addr).array[0]; 1374 return cast(__m128)la; 1375 } 1376 } 1377 unittest 1378 { 1379 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, 4.0f); 1380 __m128 B = _mm_setr_ps(5.0f, 6.0f, 7.0f, 8.0f); 1381 __m64 M = to_m64(cast(__m128i)B); 1382 __m128 R = _mm_loadh_pi(A, &M); 1383 float[4] correct = [1.0f, 2.0f, 5.0f, 6.0f]; 1384 assert(R.array == correct); 1385 } 1386 1387 /// Load 2 single-precision (32-bit) floating-point elements from memory into the lower 2 elements of result, 1388 /// and copy the upper 2 elements from `a` to result. `mem_addr` does not need to be aligned on any particular boundary. 1389 __m128 _mm_loadl_pi (__m128 a, const(__m64)* mem_addr) pure @trusted 1390 { 1391 pragma(inline, true); 1392 1393 // Disabled because of https://issues.dlang.org/show_bug.cgi?id=23046 1394 /* 1395 static if (DMD_with_DSIMD) 1396 { 1397 return cast(__m128) __simd(XMM.LODLPS, a, *cast(const(__m128)*)mem_addr); 1398 } 1399 else */ 1400 { 1401 // x86: movlpd/movlps generated with all LDC -01 1402 long2 la = cast(long2)a; 1403 la.ptr[0] = (*mem_addr).array[0]; 1404 return cast(__m128)la; 1405 } 1406 } 1407 unittest 1408 { 1409 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, 4.0f); 1410 __m128 B = _mm_setr_ps(5.0f, 6.0f, 7.0f, 8.0f); 1411 __m64 M = to_m64(cast(__m128i)B); 1412 __m128 R = _mm_loadl_pi(A, &M); 1413 float[4] correct = [5.0f, 6.0f, 3.0f, 4.0f]; 1414 assert(R.array == correct); 1415 } 1416 1417 /// Load 4 single-precision (32-bit) floating-point elements from memory in reverse order. 1418 /// `mem_addr` must be aligned on a 16-byte boundary or a general-protection exception may be generated. 1419 __m128 _mm_loadr_ps (const(float)* mem_addr) pure @trusted // FUTURE shouldn't be trusted, see #62 1420 { 1421 __m128* aligned = cast(__m128*)mem_addr; // x86: movaps + shups since LDC 1.0.0 -O1 1422 __m128 a = *aligned; 1423 static if (DMD_with_DSIMD) 1424 { 1425 return cast(__m128) __simd(XMM.SHUFPS, a, a, 27); 1426 } 1427 else 1428 { 1429 __m128 r; // PERF =void; 1430 r.ptr[0] = a.array[3]; 1431 r.ptr[1] = a.array[2]; 1432 r.ptr[2] = a.array[1]; 1433 r.ptr[3] = a.array[0]; 1434 return r; 1435 } 1436 } 1437 unittest 1438 { 1439 align(16) static immutable float[4] arr = [ 1.0f, 2.0f, 3.0f, 8.0f ]; 1440 __m128 A = _mm_loadr_ps(arr.ptr); 1441 float[4] correct = [ 8.0f, 3.0f, 2.0f, 1.0f ]; 1442 assert(A.array == correct); 1443 } 1444 1445 /// Load 128-bits (composed of 4 packed single-precision (32-bit) floating-point elements) from memory. 1446 /// `mem_addr` does not need to be aligned on any particular boundary. 1447 __m128 _mm_loadu_ps(const(float)* mem_addr) pure @trusted 1448 { 1449 pragma(inline, true); 1450 static if (GDC_with_SSE2) 1451 { 1452 return __builtin_ia32_loadups(mem_addr); 1453 } 1454 else static if (LDC_with_optimizations) 1455 { 1456 static if (LDC_with_optimizations) 1457 { 1458 return loadUnaligned!(__m128)(mem_addr); 1459 } 1460 else 1461 { 1462 __m128 result; 1463 result.ptr[0] = mem_addr[0]; 1464 result.ptr[1] = mem_addr[1]; 1465 result.ptr[2] = mem_addr[2]; 1466 result.ptr[3] = mem_addr[3]; 1467 return result; 1468 } 1469 } 1470 else version(DigitalMars) 1471 { 1472 static if (DMD_with_DSIMD) 1473 { 1474 return cast(__m128)__simd(XMM.LODUPS, *cast(const(float4*))mem_addr); 1475 } 1476 else static if (SSESizedVectorsAreEmulated) 1477 { 1478 // Since this vector is emulated, it doesn't have alignement constraints 1479 // and as such we can just cast it. 1480 return *cast(__m128*)(mem_addr); 1481 } 1482 else 1483 { 1484 __m128 result; 1485 result.ptr[0] = mem_addr[0]; 1486 result.ptr[1] = mem_addr[1]; 1487 result.ptr[2] = mem_addr[2]; 1488 result.ptr[3] = mem_addr[3]; 1489 return result; 1490 } 1491 } 1492 else 1493 { 1494 __m128 result; 1495 result.ptr[0] = mem_addr[0]; 1496 result.ptr[1] = mem_addr[1]; 1497 result.ptr[2] = mem_addr[2]; 1498 result.ptr[3] = mem_addr[3]; 1499 return result; 1500 } 1501 } 1502 unittest 1503 { 1504 align(16) static immutable float[5] arr = [ 1.0f, 2.0f, 3.0f, 8.0f, 9.0f ]; // force unaligned load 1505 __m128 A = _mm_loadu_ps(&arr[1]); 1506 float[4] correct = [ 2.0f, 3.0f, 8.0f, 9.0f ]; 1507 assert(A.array == correct); 1508 } 1509 1510 /// Allocate size bytes of memory, aligned to the alignment specified in align, 1511 /// and return a pointer to the allocated memory. `_mm_free` should be used to free 1512 /// memory that is allocated with `_mm_malloc`. 1513 void* _mm_malloc(size_t size, size_t alignment) @trusted 1514 { 1515 assert(alignment != 0); 1516 size_t request = requestedSize(size, alignment); 1517 void* raw = malloc(request); 1518 if (request > 0 && raw == null) // malloc(0) can validly return anything 1519 onOutOfMemoryError(); 1520 return storeRawPointerPlusInfo(raw, size, alignment); // PERF: no need to store size 1521 } 1522 1523 /// Conditionally store 8-bit integer elements from a into memory using mask (elements are not stored when the highest 1524 /// bit is not set in the corresponding element) and a non-temporal memory hint. 1525 void _mm_maskmove_si64 (__m64 a, __m64 mask, char* mem_addr) @trusted 1526 { 1527 // this works since mask is zero-extended 1528 return _mm_maskmoveu_si128 (to_m128i(a), to_m128i(mask), mem_addr); 1529 } 1530 1531 deprecated("Use _mm_maskmove_si64 instead") alias _m_maskmovq = _mm_maskmove_si64;/// 1532 1533 /// Compare packed signed 16-bit integers in `a` and `b`, and return packed maximum value. 1534 __m64 _mm_max_pi16 (__m64 a, __m64 b) pure @safe 1535 { 1536 return to_m64(_mm_max_epi16(to_m128i(a), to_m128i(b))); 1537 } 1538 1539 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b`, and return packed maximum values. 1540 __m128 _mm_max_ps(__m128 a, __m128 b) pure @safe 1541 { 1542 static if (DMD_with_DSIMD) 1543 { 1544 return cast(__m128) __simd(XMM.MAXPS, a, b); 1545 } 1546 else static if (GDC_with_SSE) 1547 { 1548 return __builtin_ia32_maxps(a, b); 1549 } 1550 else static if (LDC_with_SSE) 1551 { 1552 return __builtin_ia32_maxps(a, b); 1553 } 1554 else 1555 { 1556 // ARM: Optimized into fcmgt + bsl since LDC 1.8 -02 1557 __m128 r; // PERF =void; 1558 r[0] = (a[0] > b[0]) ? a[0] : b[0]; 1559 r[1] = (a[1] > b[1]) ? a[1] : b[1]; 1560 r[2] = (a[2] > b[2]) ? a[2] : b[2]; 1561 r[3] = (a[3] > b[3]) ? a[3] : b[3]; 1562 return r; 1563 } 1564 } 1565 unittest 1566 { 1567 __m128 A = _mm_setr_ps(1, 2, float.nan, 4); 1568 __m128 B = _mm_setr_ps(4, 1, 4, float.nan); 1569 __m128 M = _mm_max_ps(A, B); 1570 assert(M.array[0] == 4); 1571 assert(M.array[1] == 2); 1572 assert(M.array[2] == 4); // in case of NaN, second operand prevails (as it seems) 1573 assert(M.array[3] != M.array[3]); // in case of NaN, second operand prevails (as it seems) 1574 } 1575 1576 /// Compare packed unsigned 8-bit integers in `a` and `b`, and return packed maximum values. 1577 __m64 _mm_max_pu8 (__m64 a, __m64 b) pure @safe 1578 { 1579 return to_m64(_mm_max_epu8(to_m128i(a), to_m128i(b))); 1580 } 1581 1582 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b`, store the maximum value in the 1583 /// lower element of result, and copy the upper 3 packed elements from `a` to the upper element of result. 1584 __m128 _mm_max_ss(__m128 a, __m128 b) pure @safe 1585 { 1586 static if (DMD_with_DSIMD) 1587 { 1588 return cast(__m128) __simd(XMM.MAXSS, a, b); 1589 } 1590 else static if (GDC_with_SSE) 1591 { 1592 return __builtin_ia32_maxss(a, b); 1593 } 1594 else static if (LDC_with_SSE) 1595 { 1596 return __builtin_ia32_maxss(a, b); 1597 } 1598 else 1599 { 1600 __m128 r = a; 1601 r[0] = (a[0] > b[0]) ? a[0] : b[0]; 1602 return r; 1603 } 1604 } 1605 unittest 1606 { 1607 __m128 A = _mm_setr_ps(1, 2, 3, 4); 1608 __m128 B = _mm_setr_ps(4, 1, 4, 1); 1609 __m128 C = _mm_setr_ps(float.nan, 1, 4, 1); 1610 __m128 M = _mm_max_ss(A, B); 1611 assert(M.array[0] == 4); 1612 assert(M.array[1] == 2); 1613 assert(M.array[2] == 3); 1614 assert(M.array[3] == 4); 1615 M = _mm_max_ps(A, C); // in case of NaN, second operand prevails 1616 assert(M.array[0] != M.array[0]); 1617 M = _mm_max_ps(C, A); // in case of NaN, second operand prevails 1618 assert(M.array[0] == 1); 1619 } 1620 1621 /// Compare packed signed 16-bit integers in a and b, and return packed minimum values. 1622 __m64 _mm_min_pi16 (__m64 a, __m64 b) pure @safe 1623 { 1624 return to_m64(_mm_min_epi16(to_m128i(a), to_m128i(b))); 1625 } 1626 1627 /// Compare packed single-precision (32-bit) floating-point elements in `a` and `b`, and return packed maximum values. 1628 __m128 _mm_min_ps(__m128 a, __m128 b) pure @safe 1629 { 1630 static if (DMD_with_DSIMD) 1631 { 1632 return cast(__m128) __simd(XMM.MINPS, a, b); 1633 } 1634 else static if (GDC_with_SSE) 1635 { 1636 return __builtin_ia32_minps(a, b); 1637 } 1638 else static if (LDC_with_SSE) 1639 { 1640 // not technically needed, but better perf in debug mode 1641 return __builtin_ia32_minps(a, b); 1642 } 1643 else 1644 { 1645 // ARM: Optimized into fcmgt + bsl since LDC 1.8 -02 1646 __m128 r; // PERF =void; 1647 r[0] = (a[0] < b[0]) ? a[0] : b[0]; 1648 r[1] = (a[1] < b[1]) ? a[1] : b[1]; 1649 r[2] = (a[2] < b[2]) ? a[2] : b[2]; 1650 r[3] = (a[3] < b[3]) ? a[3] : b[3]; 1651 return r; 1652 } 1653 } 1654 unittest 1655 { 1656 __m128 A = _mm_setr_ps(1, 2, float.nan, 4); 1657 __m128 B = _mm_setr_ps(4, 1, 4, float.nan); 1658 __m128 M = _mm_min_ps(A, B); 1659 assert(M.array[0] == 1); 1660 assert(M.array[1] == 1); 1661 assert(M.array[2] == 4); // in case of NaN, second operand prevails (as it seems) 1662 assert(M.array[3] != M.array[3]); // in case of NaN, second operand prevails (as it seems) 1663 } 1664 1665 /// Compare packed unsigned 8-bit integers in `a` and `b`, and return packed minimum values. 1666 __m64 _mm_min_pu8 (__m64 a, __m64 b) pure @safe 1667 { 1668 return to_m64(_mm_min_epu8(to_m128i(a), to_m128i(b))); 1669 } 1670 1671 /// Compare the lower single-precision (32-bit) floating-point elements in `a` and `b`, store the minimum value in the 1672 /// lower element of result, and copy the upper 3 packed elements from `a` to the upper element of result. 1673 __m128 _mm_min_ss(__m128 a, __m128 b) pure @safe 1674 { 1675 static if (DMD_with_DSIMD) 1676 { 1677 return cast(__m128) __simd(XMM.MINSS, a, b); 1678 } 1679 else static if (GDC_with_SSE) 1680 { 1681 return __builtin_ia32_minss(a, b); 1682 } 1683 else static if (LDC_with_SSE) 1684 { 1685 return __builtin_ia32_minss(a, b); 1686 } 1687 else 1688 { 1689 // Generates minss since LDC 1.3 -O1 1690 __m128 r = a; 1691 r[0] = (a[0] < b[0]) ? a[0] : b[0]; 1692 return r; 1693 } 1694 } 1695 unittest 1696 { 1697 __m128 A = _mm_setr_ps(1, 2, 3, 4); 1698 __m128 B = _mm_setr_ps(4, 1, 4, 1); 1699 __m128 C = _mm_setr_ps(float.nan, 1, 4, 1); 1700 __m128 M = _mm_min_ss(A, B); 1701 assert(M.array[0] == 1); 1702 assert(M.array[1] == 2); 1703 assert(M.array[2] == 3); 1704 assert(M.array[3] == 4); 1705 M = _mm_min_ps(A, C); // in case of NaN, second operand prevails 1706 assert(M.array[0] != M.array[0]); 1707 M = _mm_min_ps(C, A); // in case of NaN, second operand prevails 1708 assert(M.array[0] == 1); 1709 } 1710 1711 /// Move the lower single-precision (32-bit) floating-point element from `b` to the lower element of result, and copy 1712 /// the upper 3 packed elements from `a` to the upper elements of result. 1713 __m128 _mm_move_ss (__m128 a, __m128 b) pure @trusted 1714 { 1715 // Workaround https://issues.dlang.org/show_bug.cgi?id=21673 1716 // inlining of this function fails. 1717 version(DigitalMars) asm nothrow @nogc pure { nop; } 1718 1719 a.ptr[0] = b.array[0]; 1720 return a; 1721 } 1722 unittest 1723 { 1724 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, 4.0f); 1725 __m128 B = _mm_setr_ps(5.0f, 6.0f, 7.0f, 8.0f); 1726 __m128 R = _mm_move_ss(A, B); 1727 float[4] correct = [5.0f, 2.0f, 3.0f, 4.0f]; 1728 assert(R.array == correct); 1729 } 1730 1731 /// Move the upper 2 single-precision (32-bit) floating-point elements from `b` to the lower 2 elements of result, and 1732 /// copy the upper 2 elements from `a` to the upper 2 elements of dst. 1733 __m128 _mm_movehl_ps (__m128 a, __m128 b) pure @trusted 1734 { 1735 // PERF DMD 1736 // Disabled because of https://issues.dlang.org/show_bug.cgi?id=19443 1737 /* 1738 static if (DMD_with_DSIMD) 1739 { 1740 1741 return cast(__m128) __simd(XMM.MOVHLPS, a, b); 1742 } 1743 else */ 1744 { 1745 a.ptr[0] = b.array[2]; 1746 a.ptr[1] = b.array[3]; 1747 return a; 1748 } 1749 } 1750 unittest 1751 { 1752 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, 4.0f); 1753 __m128 B = _mm_setr_ps(5.0f, 6.0f, 7.0f, 8.0f); 1754 __m128 R = _mm_movehl_ps(A, B); 1755 float[4] correct = [7.0f, 8.0f, 3.0f, 4.0f]; 1756 assert(R.array == correct); 1757 } 1758 1759 /// Move the lower 2 single-precision (32-bit) floating-point elements from `b` to the upper 2 elements of result, and 1760 /// copy the lower 2 elements from `a` to the lower 2 elements of result 1761 __m128 _mm_movelh_ps (__m128 a, __m128 b) pure @trusted 1762 { 1763 // Was disabled because of https://issues.dlang.org/show_bug.cgi?id=19443 1764 static if (DMD_with_DSIMD && __VERSION__ >= 2101) 1765 { 1766 return cast(__m128) __simd(XMM.MOVLHPS, a, b); 1767 } 1768 else 1769 { 1770 a.ptr[2] = b.array[0]; 1771 a.ptr[3] = b.array[1]; 1772 return a; 1773 } 1774 } 1775 unittest 1776 { 1777 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, 4.0f); 1778 __m128 B = _mm_setr_ps(5.0f, 6.0f, 7.0f, 8.0f); 1779 __m128 R = _mm_movelh_ps(A, B); 1780 float[4] correct = [1.0f, 2.0f, 5.0f, 6.0f]; 1781 assert(R.array == correct); 1782 } 1783 1784 /// Create mask from the most significant bit of each 8-bit element in `a`. 1785 int _mm_movemask_pi8 (__m64 a) pure @safe 1786 { 1787 return _mm_movemask_epi8(to_m128i(a)); 1788 } 1789 unittest 1790 { 1791 assert(0x9C == _mm_movemask_pi8(_mm_set_pi8(-1, 0, 0, -1, -1, -1, 0, 0))); 1792 } 1793 1794 /// Set each bit of result based on the most significant bit of the corresponding packed single-precision (32-bit) 1795 /// floating-point element in `a`. 1796 int _mm_movemask_ps (__m128 a) pure @trusted 1797 { 1798 // PERF: Not possible in D_SIMD because of https://issues.dlang.org/show_bug.cgi?id=8047 1799 static if (GDC_with_SSE) 1800 { 1801 return __builtin_ia32_movmskps(a); 1802 } 1803 else static if (LDC_with_SSE) 1804 { 1805 return __builtin_ia32_movmskps(a); 1806 } 1807 else static if (LDC_with_ARM) 1808 { 1809 int4 ai = cast(int4)a; 1810 int4 shift31 = [31, 31, 31, 31]; 1811 ai = ai >>> shift31; 1812 int4 shift = [0, 1, 2, 3]; 1813 ai = ai << shift; // 4-way shift, only efficient on ARM. 1814 int r = ai.array[0] + (ai.array[1]) + (ai.array[2]) + (ai.array[3]); 1815 return r; 1816 } 1817 else 1818 { 1819 int4 ai = cast(int4)a; 1820 int r = 0; 1821 if (ai.array[0] < 0) r += 1; 1822 if (ai.array[1] < 0) r += 2; 1823 if (ai.array[2] < 0) r += 4; 1824 if (ai.array[3] < 0) r += 8; 1825 return r; 1826 } 1827 } 1828 unittest 1829 { 1830 int4 A = [-1, 0, -43, 0]; 1831 assert(5 == _mm_movemask_ps(cast(float4)A)); 1832 } 1833 1834 /// Multiply packed single-precision (32-bit) floating-point elements in `a` and `b`. 1835 __m128 _mm_mul_ps(__m128 a, __m128 b) pure @safe 1836 { 1837 pragma(inline, true); 1838 return a * b; 1839 } 1840 unittest 1841 { 1842 __m128 a = [1.5f, -2.0f, 3.0f, 1.0f]; 1843 a = _mm_mul_ps(a, a); 1844 float[4] correct = [2.25f, 4.0f, 9.0f, 1.0f]; 1845 assert(a.array == correct); 1846 } 1847 1848 /// Multiply the lower single-precision (32-bit) floating-point element in `a` and `b`, store the result in the lower 1849 /// element of result, and copy the upper 3 packed elements from `a` to the upper elements of result. 1850 __m128 _mm_mul_ss(__m128 a, __m128 b) pure @safe 1851 { 1852 static if (DMD_with_DSIMD) 1853 return cast(__m128) __simd(XMM.MULSS, a, b); 1854 else static if (GDC_with_SSE) 1855 return __builtin_ia32_mulss(a, b); 1856 else 1857 { 1858 a[0] *= b[0]; 1859 return a; 1860 } 1861 } 1862 unittest 1863 { 1864 __m128 a = [1.5f, -2.0f, 3.0f, 1.0f]; 1865 a = _mm_mul_ss(a, a); 1866 float[4] correct = [2.25f, -2.0f, 3.0f, 1.0f]; 1867 assert(a.array == correct); 1868 } 1869 1870 /// Multiply the packed unsigned 16-bit integers in `a` and `b`, producing intermediate 32-bit integers, 1871 /// and return the high 16 bits of the intermediate integers. 1872 __m64 _mm_mulhi_pu16 (__m64 a, __m64 b) pure @safe 1873 { 1874 return to_m64(_mm_mulhi_epu16(to_m128i(a), to_m128i(b))); 1875 } 1876 unittest 1877 { 1878 __m64 A = _mm_setr_pi16(0, -16, 2, 3); 1879 __m64 B = _mm_set1_pi16(16384); 1880 short4 R = cast(short4)_mm_mulhi_pu16(A, B); 1881 short[4] correct = [0, 0x3FFC, 0, 0]; 1882 assert(R.array == correct); 1883 } 1884 1885 /// Compute the bitwise OR of packed single-precision (32-bit) floating-point elements in `a` and `b`, and 1886 /// return the result. 1887 __m128 _mm_or_ps (__m128 a, __m128 b) pure @safe 1888 { 1889 static if (DMD_with_DSIMD) 1890 return cast(__m128)__simd(XMM.ORPS, a, b); 1891 else 1892 return cast(__m128)(cast(__m128i)a | cast(__m128i)b); 1893 } 1894 unittest 1895 { 1896 __m128 A = cast(__m128) _mm_set1_epi32(0x80000000); 1897 __m128 B = _mm_setr_ps(4.0f, -5.0, -9.5f, float.infinity); 1898 __m128 C = _mm_or_ps(A, B); 1899 float[4] correct = [-4.0f, -5.0, -9.5f, -float.infinity]; 1900 assert(C.array == correct); 1901 } 1902 1903 deprecated("Use _mm_avg_pu8 instead") alias _m_pavgb = _mm_avg_pu8;/// 1904 deprecated("Use _mm_avg_pu16 instead") alias _m_pavgw = _mm_avg_pu16;/// 1905 deprecated("Use _mm_extract_pi16 instead") alias _m_pextrw = _mm_extract_pi16;/// 1906 deprecated("Use _mm_insert_pi16 instead") alias _m_pinsrw = _mm_insert_pi16;/// 1907 deprecated("Use _mm_max_pi16 instead") alias _m_pmaxsw = _mm_max_pi16;/// 1908 deprecated("Use _mm_max_pu8 instead") alias _m_pmaxub = _mm_max_pu8;/// 1909 deprecated("Use _mm_min_pi16 instead") alias _m_pminsw = _mm_min_pi16;/// 1910 deprecated("Use _mm_min_pu8 instead") alias _m_pminub = _mm_min_pu8;/// 1911 deprecated("Use _mm_movemask_pi8 instead") alias _m_pmovmskb = _mm_movemask_pi8;/// 1912 deprecated("Use _mm_mulhi_pu16 instead") alias _m_pmulhuw = _mm_mulhi_pu16;/// 1913 1914 enum _MM_HINT_T0 = 3; /// 1915 enum _MM_HINT_T1 = 2; /// 1916 enum _MM_HINT_T2 = 1; /// 1917 enum _MM_HINT_NTA = 0; /// 1918 1919 1920 version(LDC) 1921 { 1922 // Starting with LLVM 10, it seems llvm.prefetch has changed its name. 1923 // Was reported at: https://github.com/ldc-developers/ldc/issues/3397 1924 static if (__VERSION__ >= 2091) 1925 { 1926 pragma(LDC_intrinsic, "llvm.prefetch.p0i8") // was "llvm.prefetch" 1927 void llvm_prefetch_fixed(void* ptr, uint rw, uint locality, uint cachetype) pure @safe; 1928 } 1929 } 1930 1931 /// Fetch the line of data from memory that contains address `p` to a location in the 1932 /// cache hierarchy specified by the locality hint i. 1933 /// 1934 /// Warning: `locality` is a compile-time parameter, unlike in Intel Intrinsics API. 1935 void _mm_prefetch(int locality)(const(void)* p) pure @trusted 1936 { 1937 static if (GDC_with_SSE) 1938 { 1939 return __builtin_prefetch(p, (locality & 0x4) >> 2, locality & 0x3); 1940 } 1941 else static if (DMD_with_DSIMD) 1942 { 1943 enum bool isWrite = (locality & 0x4) != 0; 1944 enum level = locality & 3; 1945 return prefetch!(isWrite, level)(p); 1946 } 1947 else version(LDC) 1948 { 1949 static if ((__VERSION__ >= 2091) && (__VERSION__ < 2106)) 1950 { 1951 // const_cast here. `llvm_prefetch` wants a mutable pointer 1952 llvm_prefetch_fixed( cast(void*)p, 0, locality, 1); 1953 } 1954 else 1955 { 1956 // const_cast here. `llvm_prefetch` wants a mutable pointer 1957 llvm_prefetch( cast(void*)p, 0, locality, 1); 1958 } 1959 } 1960 else version(D_InlineAsm_X86_64) 1961 { 1962 static if (locality == _MM_HINT_NTA) 1963 { 1964 asm pure nothrow @nogc @trusted 1965 { 1966 mov RAX, p; 1967 prefetchnta [RAX]; 1968 } 1969 } 1970 else static if (locality == _MM_HINT_T0) 1971 { 1972 asm pure nothrow @nogc @trusted 1973 { 1974 mov RAX, p; 1975 prefetcht0 [RAX]; 1976 } 1977 } 1978 else static if (locality == _MM_HINT_T1) 1979 { 1980 asm pure nothrow @nogc @trusted 1981 { 1982 mov RAX, p; 1983 prefetcht1 [RAX]; 1984 } 1985 } 1986 else static if (locality == _MM_HINT_T2) 1987 { 1988 asm pure nothrow @nogc @trusted 1989 { 1990 mov RAX, p; 1991 prefetcht2 [RAX]; 1992 } 1993 } 1994 else 1995 assert(false); // invalid locality hint 1996 } 1997 else version(D_InlineAsm_X86) 1998 { 1999 static if (locality == _MM_HINT_NTA) 2000 { 2001 asm pure nothrow @nogc @trusted 2002 { 2003 mov EAX, p; 2004 prefetchnta [EAX]; 2005 } 2006 } 2007 else static if (locality == _MM_HINT_T0) 2008 { 2009 asm pure nothrow @nogc @trusted 2010 { 2011 mov EAX, p; 2012 prefetcht0 [EAX]; 2013 } 2014 } 2015 else static if (locality == _MM_HINT_T1) 2016 { 2017 asm pure nothrow @nogc @trusted 2018 { 2019 mov EAX, p; 2020 prefetcht1 [EAX]; 2021 } 2022 } 2023 else static if (locality == _MM_HINT_T2) 2024 { 2025 asm pure nothrow @nogc @trusted 2026 { 2027 mov EAX, p; 2028 prefetcht2 [EAX]; 2029 } 2030 } 2031 else 2032 assert(false); // invalid locality hint 2033 } 2034 else 2035 { 2036 // Generic version: do nothing. From bitter experience, 2037 // it's unlikely you get ANY speed-up with manual prefetching. 2038 // Prefetching or not doesn't change program behaviour. 2039 } 2040 } 2041 unittest 2042 { 2043 // From Intel documentation: 2044 // "The amount of data prefetched is also processor implementation-dependent. It will, however, be a minimum of 2045 // 32 bytes." 2046 ubyte[256] cacheline; // though it seems it cannot generate GP fault 2047 _mm_prefetch!_MM_HINT_T0(cacheline.ptr); 2048 _mm_prefetch!_MM_HINT_T1(cacheline.ptr); 2049 _mm_prefetch!_MM_HINT_T2(cacheline.ptr); 2050 _mm_prefetch!_MM_HINT_NTA(cacheline.ptr); 2051 } 2052 2053 deprecated("Use _mm_sad_pu8 instead") alias _m_psadbw = _mm_sad_pu8;/// 2054 deprecated("Use _mm_shuffle_pi16 instead") alias _m_pshufw = _mm_shuffle_pi16;/// 2055 2056 2057 /// Compute the approximate reciprocal of packed single-precision (32-bit) floating-point elements in a`` , 2058 /// and return the results. The maximum relative error for this approximation is less than 1.5*2^-12. 2059 __m128 _mm_rcp_ps (__m128 a) pure @trusted 2060 { 2061 static if (DMD_with_DSIMD) 2062 { 2063 return cast(__m128) __simd(XMM.RCPPS, a); 2064 } 2065 else static if (GDC_with_SSE) 2066 { 2067 return __builtin_ia32_rcpps(a); 2068 } 2069 else static if (LDC_with_SSE) 2070 { 2071 return __builtin_ia32_rcpps(a); 2072 } 2073 else 2074 { 2075 a.ptr[0] = 1.0f / a.array[0]; 2076 a.ptr[1] = 1.0f / a.array[1]; 2077 a.ptr[2] = 1.0f / a.array[2]; 2078 a.ptr[3] = 1.0f / a.array[3]; 2079 return a; 2080 } 2081 } 2082 unittest 2083 { 2084 __m128 A = _mm_setr_ps(2.34f, -70000.0f, 0.00001f, 345.5f); 2085 __m128 groundTruth = _mm_set1_ps(1.0f) / A; 2086 __m128 result = _mm_rcp_ps(A); 2087 foreach(i; 0..4) 2088 { 2089 double relError = (cast(double)(groundTruth.array[i]) / result.array[i]) - 1; 2090 assert(abs_double(relError) < 0.00037); // 1.5*2^-12 is 0.00036621093 2091 } 2092 } 2093 2094 /// Compute the approximate reciprocal of the lower single-precision (32-bit) floating-point element in `a`, store it 2095 /// in the lower element of the result, and copy the upper 3 packed elements from `a` to the upper elements of result. 2096 /// The maximum relative error for this approximation is less than 1.5*2^-12. 2097 __m128 _mm_rcp_ss (__m128 a) pure @trusted 2098 { 2099 // Disabled, see https://issues.dlang.org/show_bug.cgi?id=23049 2100 /*static if (DMD_with_DSIMD) 2101 { 2102 return cast(__m128) __simd(XMM.RCPSS, a); 2103 } 2104 else*/ 2105 static if (GDC_with_SSE) 2106 { 2107 return __builtin_ia32_rcpss(a); 2108 } 2109 else static if (LDC_with_SSE) 2110 { 2111 return __builtin_ia32_rcpss(a); 2112 } 2113 else 2114 { 2115 a.ptr[0] = 1.0f / a.array[0]; 2116 return a; 2117 } 2118 } 2119 unittest 2120 { 2121 __m128 A = _mm_setr_ps(2.34f, -70000.0f, 0.00001f, 345.5f); 2122 __m128 correct = _mm_setr_ps(1 / 2.34f, -70000.0f, 0.00001f, 345.5f); 2123 __m128 R = _mm_rcp_ss(A); 2124 double relError = (cast(double)(correct.array[0]) / R.array[0]) - 1; 2125 assert(abs_double(relError) < 0.00037); // 1.5*2^-12 is 0.00036621093 2126 assert(R.array[1] == correct.array[1]); 2127 assert(R.array[2] == correct.array[2]); 2128 assert(R.array[3] == correct.array[3]); 2129 } 2130 2131 /// Reallocate `size` bytes of memory, aligned to the alignment specified in `alignment`, and 2132 /// return a pointer to the newly allocated memory. 2133 /// Previous data is preserved if any. 2134 /// 2135 /// IMPORTANT: `size` MUST be > 0. 2136 /// 2137 /// `_mm_free` MUST be used to free memory that is allocated with `_mm_malloc` or `_mm_realloc`. 2138 /// Do NOT call _mm_realloc with size = 0. 2139 void* _mm_realloc(void* aligned, size_t size, size_t alignment) nothrow @nogc // #BONUS 2140 { 2141 return alignedReallocImpl!true(aligned, size, alignment); 2142 } 2143 unittest 2144 { 2145 enum NALLOC = 8; 2146 enum size_t[8] ALIGNMENTS = [1, 2, 4, 8, 16, 32, 64, 128]; 2147 2148 void*[NALLOC] alloc; 2149 2150 foreach(t; 0..100) 2151 { 2152 foreach(n; 0..NALLOC) 2153 { 2154 size_t alignment = ALIGNMENTS[n]; 2155 size_t s = 1 + ( (n + t * 69096) & 0xffff ); 2156 alloc[n] = _mm_realloc(alloc[n], s, alignment); 2157 assert(isPointerAligned(alloc[n], alignment)); 2158 foreach(b; 0..s) 2159 (cast(ubyte*)alloc[n])[b] = cast(ubyte)n; 2160 } 2161 } 2162 foreach(n; 0..NALLOC) 2163 { 2164 _mm_free(alloc[n]); 2165 } 2166 } 2167 2168 /// Reallocate `size` bytes of memory, aligned to the alignment specified in `alignment`, and 2169 /// return a pointer to the newly allocated memory. 2170 /// Previous data is discarded. 2171 /// 2172 /// IMPORTANT: `size` MUST be > 0. 2173 /// 2174 /// `_mm_free` MUST be used to free memory that is allocated with `_mm_malloc` or `_mm_realloc`. 2175 void* _mm_realloc_discard(void* aligned, size_t size, size_t alignment) nothrow @nogc // #BONUS 2176 { 2177 return alignedReallocImpl!false(aligned, size, alignment); 2178 } 2179 2180 /// Compute the approximate reciprocal square root of packed single-precision (32-bit) floating-point elements in `a`. 2181 /// The maximum relative error for this approximation is less than 1.5*2^-12. 2182 __m128 _mm_rsqrt_ps (__m128 a) pure @trusted 2183 { 2184 static if (DMD_with_DSIMD) 2185 { 2186 return cast(__m128) __simd(XMM.RSQRTPS, a); 2187 } 2188 else static if (GDC_with_SSE) 2189 { 2190 return __builtin_ia32_rsqrtps(a); 2191 } 2192 else static if (LDC_with_SSE) 2193 { 2194 return __builtin_ia32_rsqrtps(a); 2195 } 2196 else version(LDC) 2197 { 2198 a[0] = 1.0f / llvm_sqrt(a[0]); 2199 a[1] = 1.0f / llvm_sqrt(a[1]); 2200 a[2] = 1.0f / llvm_sqrt(a[2]); 2201 a[3] = 1.0f / llvm_sqrt(a[3]); 2202 return a; 2203 } 2204 else 2205 { 2206 a.ptr[0] = 1.0f / sqrt(a.array[0]); 2207 a.ptr[1] = 1.0f / sqrt(a.array[1]); 2208 a.ptr[2] = 1.0f / sqrt(a.array[2]); 2209 a.ptr[3] = 1.0f / sqrt(a.array[3]); 2210 return a; 2211 } 2212 } 2213 unittest 2214 { 2215 __m128 A = _mm_setr_ps(2.34f, 70000.0f, 0.00001f, 345.5f); 2216 __m128 groundTruth = _mm_setr_ps(0.65372045f, 0.00377964473f, 316.227766f, 0.05379921937f); 2217 __m128 result = _mm_rsqrt_ps(A); 2218 foreach(i; 0..4) 2219 { 2220 double relError = (cast(double)(groundTruth.array[i]) / result.array[i]) - 1; 2221 assert(abs_double(relError) < 0.00037); // 1.5*2^-12 is 0.00036621093 2222 } 2223 } 2224 2225 /// Compute the approximate reciprocal square root of the lower single-precision (32-bit) floating-point element in `a`, 2226 /// store the result in the lower element. Copy the upper 3 packed elements from `a` to the upper elements of result. 2227 /// The maximum relative error for this approximation is less than 1.5*2^-12. 2228 __m128 _mm_rsqrt_ss (__m128 a) pure @trusted 2229 { 2230 static if (DMD_with_DSIMD) 2231 { 2232 return cast(__m128) __simd(XMM.RSQRTSS, a); 2233 } 2234 else static if (GDC_with_SSE) 2235 { 2236 return __builtin_ia32_rsqrtss(a); 2237 } 2238 else static if (LDC_with_SSE) 2239 { 2240 return __builtin_ia32_rsqrtss(a); 2241 } 2242 else version(LDC) 2243 { 2244 a[0] = 1.0f / llvm_sqrt(a[0]); 2245 return a; 2246 } 2247 else 2248 { 2249 a[0] = 1.0f / sqrt(a[0]); 2250 return a; 2251 } 2252 } 2253 unittest // this one test 4 different intrinsics: _mm_rsqrt_ss, _mm_rsqrt_ps, _mm_rcp_ps, _mm_rcp_ss 2254 { 2255 double maxRelativeError = 0.000245; // -72 dB, stuff is apparently more precise than said in the doc? 2256 void testApproximateSSE(float number) nothrow @nogc 2257 { 2258 __m128 A = _mm_set1_ps(number); 2259 2260 // test _mm_rcp_ps 2261 __m128 B = _mm_rcp_ps(A); 2262 foreach(i; 0..4) 2263 { 2264 double exact = 1.0f / A.array[i]; 2265 double ratio = cast(double)(B.array[i]) / cast(double)(exact); 2266 assert(abs_double(ratio - 1) <= maxRelativeError); 2267 } 2268 2269 // test _mm_rcp_ss 2270 { 2271 B = _mm_rcp_ss(A); 2272 double exact = 1.0f / A.array[0]; 2273 double ratio = cast(double)(B.array[0]) / cast(double)(exact); 2274 assert(abs_double(ratio - 1) <= maxRelativeError); 2275 } 2276 2277 // test _mm_rsqrt_ps 2278 B = _mm_rsqrt_ps(A); 2279 foreach(i; 0..4) 2280 { 2281 double exact = 1.0f / sqrt(A.array[i]); 2282 double ratio = cast(double)(B.array[i]) / cast(double)(exact); 2283 assert(abs_double(ratio - 1) <= maxRelativeError); 2284 } 2285 2286 // test _mm_rsqrt_ss 2287 { 2288 B = _mm_rsqrt_ss(A); 2289 double exact = 1.0f / sqrt(A.array[0]); 2290 double ratio = cast(double)(B.array[0]) / cast(double)(exact); 2291 assert(abs_double(ratio - 1) <= maxRelativeError); 2292 } 2293 } 2294 2295 testApproximateSSE(0.00001f); 2296 testApproximateSSE(1.1f); 2297 testApproximateSSE(345.0f); 2298 testApproximateSSE(2.45674864151f); 2299 testApproximateSSE(700000.0f); 2300 testApproximateSSE(10000000.0f); 2301 testApproximateSSE(27841456468.0f); 2302 } 2303 2304 /// Compute the absolute differences of packed unsigned 8-bit integers in `a` and `b`, then horizontally sum each 2305 /// consecutive 8 differences to produce four unsigned 16-bit integers, and pack these unsigned 16-bit integers in the 2306 /// low 16 bits of result. 2307 __m64 _mm_sad_pu8 (__m64 a, __m64 b) pure @safe 2308 { 2309 return to_m64(_mm_sad_epu8(to_m128i(a), to_m128i(b))); 2310 } 2311 2312 /// Set the exception mask bits of the MXCSR control and status register to the value in unsigned 32-bit integer 2313 /// `_MM_MASK_xxxx`. The exception mask may contain any of the following flags: `_MM_MASK_INVALID`, `_MM_MASK_DIV_ZERO`, 2314 /// `_MM_MASK_DENORM`, `_MM_MASK_OVERFLOW`, `_MM_MASK_UNDERFLOW`, `_MM_MASK_INEXACT`. 2315 void _MM_SET_EXCEPTION_MASK(int _MM_MASK_xxxx) @safe 2316 { 2317 // Note: unsupported on ARM 2318 _mm_setcsr((_mm_getcsr() & ~_MM_MASK_MASK) | _MM_MASK_xxxx); 2319 } 2320 2321 /// Set the exception state bits of the MXCSR control and status register to the value in unsigned 32-bit integer 2322 /// `_MM_EXCEPT_xxxx`. The exception state may contain any of the following flags: `_MM_EXCEPT_INVALID`, 2323 /// `_MM_EXCEPT_DIV_ZERO`, `_MM_EXCEPT_DENORM`, `_MM_EXCEPT_OVERFLOW`, `_MM_EXCEPT_UNDERFLOW`, `_MM_EXCEPT_INEXACT`. 2324 void _MM_SET_EXCEPTION_STATE(int _MM_EXCEPT_xxxx) @safe 2325 { 2326 // Note: unsupported on ARM 2327 _mm_setcsr((_mm_getcsr() & ~_MM_EXCEPT_MASK) | _MM_EXCEPT_xxxx); 2328 } 2329 2330 /// Set the flush zero bits of the MXCSR control and status register to the value in unsigned 32-bit integer 2331 /// `_MM_FLUSH_xxxx`. The flush zero may contain any of the following flags: `_MM_FLUSH_ZERO_ON` or `_MM_FLUSH_ZERO_OFF`. 2332 void _MM_SET_FLUSH_ZERO_MODE(int _MM_FLUSH_xxxx) @safe 2333 { 2334 _mm_setcsr((_mm_getcsr() & ~_MM_FLUSH_ZERO_MASK) | _MM_FLUSH_xxxx); 2335 } 2336 2337 /// Set packed single-precision (32-bit) floating-point elements with the supplied values. 2338 __m128 _mm_set_ps (float e3, float e2, float e1, float e0) pure @trusted 2339 { 2340 __m128 r = void; 2341 r.ptr[0] = e0; 2342 r.ptr[1] = e1; 2343 r.ptr[2] = e2; 2344 r.ptr[3] = e3; 2345 return r; 2346 } 2347 unittest 2348 { 2349 __m128 A = _mm_set_ps(3, 2, 1, 546); 2350 float[4] correct = [546.0f, 1.0f, 2.0f, 3.0f]; 2351 assert(A.array == correct); 2352 } 2353 2354 deprecated("Use _mm_set1_ps instead") alias _mm_set_ps1 = _mm_set1_ps; /// 2355 2356 /// Set the rounding mode bits of the MXCSR control and status register to the value in unsigned 32-bit integer 2357 /// `_MM_ROUND_xxxx`. The rounding mode may contain any of the following flags: `_MM_ROUND_NEAREST`, `_MM_ROUND_DOWN`, 2358 /// `_MM_ROUND_UP`, `_MM_ROUND_TOWARD_ZERO`. 2359 void _MM_SET_ROUNDING_MODE(int _MM_ROUND_xxxx) @safe 2360 { 2361 // Work-around for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98607 2362 version(GNU) asm nothrow @nogc @trusted { "" : : : "memory"; } 2363 _mm_setcsr((_mm_getcsr() & ~_MM_ROUND_MASK) | _MM_ROUND_xxxx); 2364 } 2365 2366 /// Copy single-precision (32-bit) floating-point element `a` to the lower element of result, and zero the upper 3 elements. 2367 __m128 _mm_set_ss (float a) pure @trusted 2368 { 2369 static if (DMD_with_DSIMD) 2370 { 2371 return cast(__m128) __simd(XMM.LODSS, a); 2372 } 2373 else 2374 { 2375 __m128 r = _mm_setzero_ps(); 2376 r.ptr[0] = a; 2377 return r; 2378 } 2379 } 2380 unittest 2381 { 2382 float[4] correct = [42.0f, 0.0f, 0.0f, 0.0f]; 2383 __m128 A = _mm_set_ss(42.0f); 2384 assert(A.array == correct); 2385 } 2386 2387 /// Broadcast single-precision (32-bit) floating-point value `a` to all elements. 2388 __m128 _mm_set1_ps (float a) pure @trusted 2389 { 2390 pragma(inline, true); 2391 __m128 r = a; 2392 return r; 2393 } 2394 unittest 2395 { 2396 float[4] correct = [42.0f, 42.0f, 42.0f, 42.0f]; 2397 __m128 A = _mm_set1_ps(42.0f); 2398 assert(A.array == correct); 2399 } 2400 2401 /// Set the MXCSR control and status register with the value in unsigned 32-bit integer `controlWord`. 2402 void _mm_setcsr(uint controlWord) @trusted 2403 { 2404 static if (LDC_with_ARM) 2405 { 2406 // Convert from SSE to ARM control word. This is done _partially_ 2407 // and only support rounding mode changes. 2408 2409 // "To alter some bits of a VFP system register without 2410 // affecting other bits, use a read-modify-write procedure" 2411 uint fpscr = arm_get_fpcr(); 2412 2413 // Bits 23 to 22 are rounding modes, however not used in NEON 2414 fpscr = fpscr & ~_MM_ROUND_MASK_ARM; 2415 switch(controlWord & _MM_ROUND_MASK) 2416 { 2417 default: 2418 case _MM_ROUND_NEAREST: fpscr |= _MM_ROUND_NEAREST_ARM; break; 2419 case _MM_ROUND_DOWN: fpscr |= _MM_ROUND_DOWN_ARM; break; 2420 case _MM_ROUND_UP: fpscr |= _MM_ROUND_UP_ARM; break; 2421 case _MM_ROUND_TOWARD_ZERO: fpscr |= _MM_ROUND_TOWARD_ZERO_ARM; break; 2422 } 2423 fpscr = fpscr & ~_MM_FLUSH_ZERO_MASK_ARM; 2424 if (controlWord & _MM_FLUSH_ZERO_MASK) 2425 fpscr |= _MM_FLUSH_ZERO_MASK_ARM; 2426 arm_set_fpcr(fpscr); 2427 } 2428 else version(GNU) 2429 { 2430 static if (GDC_with_SSE) 2431 { 2432 // Work-around for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98607 2433 version(GNU) asm nothrow @nogc @trusted { "" : : : "memory"; } 2434 __builtin_ia32_ldmxcsr(controlWord); 2435 } 2436 else version(X86) 2437 { 2438 asm nothrow @nogc @trusted 2439 { 2440 "ldmxcsr %0;\n" 2441 : 2442 : "m" (controlWord) 2443 : ; 2444 } 2445 } 2446 else 2447 static assert(false); 2448 } 2449 else version (InlineX86Asm) 2450 { 2451 asm nothrow @nogc @trusted 2452 { 2453 ldmxcsr controlWord; 2454 } 2455 } 2456 else 2457 static assert(0, "Not yet supported"); 2458 } 2459 unittest 2460 { 2461 _mm_setcsr(_mm_getcsr()); 2462 } 2463 2464 /// Set packed single-precision (32-bit) floating-point elements with the supplied values in reverse order. 2465 __m128 _mm_setr_ps (float e3, float e2, float e1, float e0) pure @trusted 2466 { 2467 pragma(inline, true); 2468 2469 // This small = void here wins a bit in all optimization levels in GDC 2470 // and in -O0 in LDC. 2471 __m128 r = void; 2472 r.ptr[0] = e3; 2473 r.ptr[1] = e2; 2474 r.ptr[2] = e1; 2475 r.ptr[3] = e0; 2476 return r; 2477 } 2478 unittest 2479 { 2480 __m128 A = _mm_setr_ps(3, 2, 1, 546); 2481 float[4] correct = [3.0f, 2.0f, 1.0f, 546.0f]; 2482 assert(A.array == correct); 2483 } 2484 2485 /// Return vector of type `__m128` with all elements set to zero. 2486 __m128 _mm_setzero_ps() pure @trusted 2487 { 2488 pragma(inline, true); 2489 2490 // Note: for all compilers, this works best in debug builds, and in DMD -O 2491 int4 r; 2492 return cast(__m128)r; 2493 } 2494 unittest 2495 { 2496 __m128 R = _mm_setzero_ps(); 2497 float[4] correct = [0.0f, 0, 0, 0]; 2498 assert(R.array == correct); 2499 } 2500 2501 /// Do a serializing operation on all store-to-memory instructions that were issued prior 2502 /// to this instruction. Guarantees that every store instruction that precedes, in program order, 2503 /// is globally visible before any store instruction which follows the fence in program order. 2504 void _mm_sfence() @trusted 2505 { 2506 version(GNU) 2507 { 2508 static if (GDC_with_SSE) 2509 { 2510 __builtin_ia32_sfence(); 2511 } 2512 else version(X86) 2513 { 2514 asm pure nothrow @nogc @trusted 2515 { 2516 "sfence;\n" : : : ; 2517 } 2518 } 2519 else 2520 static assert(false); 2521 } 2522 else static if (LDC_with_SSE) 2523 { 2524 __builtin_ia32_sfence(); 2525 } 2526 else static if (DMD_with_asm) 2527 { 2528 // PERF: can't be inlined in DMD, probably because of that assembly. 2529 asm nothrow @nogc pure @trusted 2530 { 2531 sfence; 2532 } 2533 } 2534 else static if (LDC_with_ARM64) 2535 { 2536 __builtin_arm_dmb(10); // dmb ishst 2537 } 2538 else version(LDC) 2539 { 2540 // When the architecture is unknown, generate a full memory barrier, 2541 // as the semantics of sfence do not really match those of atomics. 2542 llvm_memory_fence(); 2543 } 2544 else 2545 static assert(false); 2546 } 2547 unittest 2548 { 2549 _mm_sfence(); 2550 } 2551 2552 2553 __m64 _mm_shuffle_pi16(int imm8)(__m64 a) pure @trusted 2554 { 2555 // PERF DMD + D_SIMD 2556 version(LDC) 2557 { 2558 return cast(__m64) shufflevectorLDC!(short4, ( (imm8 >> 0) & 3 ), 2559 ( (imm8 >> 2) & 3 ), 2560 ( (imm8 >> 4) & 3 ), 2561 ( (imm8 >> 6) & 3 ))(cast(short4)a, cast(short4)a); 2562 } 2563 else 2564 { 2565 // GDC optimizes that correctly starting with -O2 2566 short4 sa = cast(short4)a; 2567 short4 r = void; 2568 r.ptr[0] = sa.array[ (imm8 >> 0) & 3 ]; 2569 r.ptr[1] = sa.array[ (imm8 >> 2) & 3 ]; 2570 r.ptr[2] = sa.array[ (imm8 >> 4) & 3 ]; 2571 r.ptr[3] = sa.array[ (imm8 >> 6) & 3 ]; 2572 return cast(__m64)r; 2573 } 2574 } 2575 unittest 2576 { 2577 __m64 A = _mm_setr_pi16(0, 1, 2, 3); 2578 enum int SHUFFLE = _MM_SHUFFLE(0, 1, 2, 3); 2579 short4 B = cast(short4) _mm_shuffle_pi16!SHUFFLE(A); 2580 short[4] expectedB = [ 3, 2, 1, 0 ]; 2581 assert(B.array == expectedB); 2582 } 2583 2584 /// Shuffle single-precision (32-bit) floating-point elements in `a` and `b` using the control in `imm8`, 2585 /// Warning: the immediate shuffle value `imm` is given at compile-time instead of runtime. 2586 __m128 _mm_shuffle_ps(ubyte imm8)(__m128 a, __m128 b) pure @trusted 2587 { 2588 static if (GDC_with_SSE) 2589 { 2590 return __builtin_ia32_shufps(a, b, imm8); 2591 } 2592 else static if (DMD_with_DSIMD) 2593 { 2594 return cast(__m128) __simd(XMM.SHUFPS, a, b, imm8); 2595 } 2596 else static if (LDC_with_optimizations) 2597 { 2598 return shufflevectorLDC!(__m128, imm8 & 3, (imm8>>2) & 3, 2599 4 + ((imm8>>4) & 3), 4 + ((imm8>>6) & 3) )(a, b); 2600 } 2601 else 2602 { 2603 float4 r = void; 2604 r.ptr[0] = a.array[ (imm8 >> 0) & 3 ]; 2605 r.ptr[1] = a.array[ (imm8 >> 2) & 3 ]; 2606 r.ptr[2] = b.array[ (imm8 >> 4) & 3 ]; 2607 r.ptr[3] = b.array[ (imm8 >> 6) & 3 ]; 2608 return r; 2609 } 2610 } 2611 unittest 2612 { 2613 __m128 A = _mm_setr_ps(0, 1, 2, 3); 2614 __m128 B = _mm_setr_ps(4, 5, 6, 7); 2615 __m128 C = _mm_shuffle_ps!0x9c(A, B); 2616 float[4] correct = [0.0f, 3, 5, 6]; 2617 assert(C.array == correct); 2618 } 2619 2620 /// Compute the square root of packed single-precision (32-bit) floating-point elements in `a`. 2621 __m128 _mm_sqrt_ps(__m128 a) @trusted 2622 { 2623 static if (GDC_with_SSE) 2624 { 2625 return __builtin_ia32_sqrtps(a); 2626 } 2627 else static if (DMD_with_DSIMD) 2628 { 2629 return cast(__m128) __simd(XMM.SQRTPS, a); 2630 } 2631 else version(LDC) 2632 { 2633 // Disappeared with LDC 1.11 2634 static if (__VERSION__ < 2081) 2635 return __builtin_ia32_sqrtps(a); 2636 else 2637 { 2638 // PERF: use llvm_sqrt on the vector, works better 2639 a[0] = llvm_sqrt(a[0]); 2640 a[1] = llvm_sqrt(a[1]); 2641 a[2] = llvm_sqrt(a[2]); 2642 a[3] = llvm_sqrt(a[3]); 2643 return a; 2644 } 2645 } 2646 else 2647 { 2648 a.ptr[0] = sqrt(a.array[0]); 2649 a.ptr[1] = sqrt(a.array[1]); 2650 a.ptr[2] = sqrt(a.array[2]); 2651 a.ptr[3] = sqrt(a.array[3]); 2652 return a; 2653 } 2654 } 2655 unittest 2656 { 2657 __m128 A = _mm_sqrt_ps(_mm_set1_ps(4.0f)); 2658 assert(A.array[0] == 2.0f); 2659 assert(A.array[1] == 2.0f); 2660 assert(A.array[2] == 2.0f); 2661 assert(A.array[3] == 2.0f); 2662 } 2663 2664 /// Compute the square root of the lower single-precision (32-bit) floating-point element in `a`, store it in the lower 2665 /// element, and copy the upper 3 packed elements from `a` to the upper elements of result. 2666 __m128 _mm_sqrt_ss(__m128 a) @trusted 2667 { 2668 static if (GDC_with_SSE) 2669 { 2670 return __builtin_ia32_sqrtss(a); 2671 } 2672 // PERF DMD 2673 // TODO: enable when https://issues.dlang.org/show_bug.cgi?id=23437 is fixed for good 2674 /*else static if (DMD_with_DSIMD) 2675 { 2676 return cast(__m128) __simd(XMM.SQRTSS, a); 2677 }*/ 2678 else version(LDC) 2679 { 2680 a.ptr[0] = llvm_sqrt(a.array[0]); 2681 return a; 2682 } 2683 else 2684 { 2685 a.ptr[0] = sqrt(a.array[0]); 2686 return a; 2687 } 2688 } 2689 unittest 2690 { 2691 __m128 A = _mm_sqrt_ss(_mm_set1_ps(4.0f)); 2692 assert(A.array[0] == 2.0f); 2693 assert(A.array[1] == 4.0f); 2694 assert(A.array[2] == 4.0f); 2695 assert(A.array[3] == 4.0f); 2696 } 2697 2698 /// Store 128-bits (composed of 4 packed single-precision (32-bit) floating-point elements) from `a` into memory. 2699 /// `mem_addr` must be aligned on a 16-byte boundary or a general-protection exception may be generated. 2700 void _mm_store_ps (float* mem_addr, __m128 a) pure 2701 { 2702 pragma(inline, true); 2703 __m128* aligned = cast(__m128*)mem_addr; 2704 *aligned = a; 2705 } 2706 2707 deprecated("Use _mm_store1_ps instead") alias _mm_store_ps1 = _mm_store1_ps; /// 2708 2709 /// Store the lower single-precision (32-bit) floating-point element from `a` into memory. 2710 /// `mem_addr` does not need to be aligned on any particular boundary. 2711 void _mm_store_ss (float* mem_addr, __m128 a) pure @safe 2712 { 2713 pragma(inline, true); 2714 *mem_addr = a.array[0]; 2715 } 2716 unittest 2717 { 2718 float a; 2719 _mm_store_ss(&a, _mm_set_ps(3, 2, 1, 546)); 2720 assert(a == 546); 2721 } 2722 2723 /// Store the lower single-precision (32-bit) floating-point element from `a` into 4 contiguous elements in memory. 2724 /// `mem_addr` must be aligned on a 16-byte boundary or a general-protection exception may be generated. 2725 void _mm_store1_ps(float* mem_addr, __m128 a) pure @trusted // FUTURE: shouldn't be trusted, see #62 2726 { 2727 __m128* aligned = cast(__m128*)mem_addr; 2728 static if (DMD_with_DSIMD) 2729 { 2730 __m128 r = cast(__m128) __simd(XMM.SHUFPS, a, a, 0); 2731 } 2732 else 2733 { 2734 __m128 r; // PERF =void; 2735 r.ptr[0] = a.array[0]; 2736 r.ptr[1] = a.array[0]; 2737 r.ptr[2] = a.array[0]; 2738 r.ptr[3] = a.array[0]; 2739 } 2740 *aligned = r; 2741 } 2742 unittest 2743 { 2744 align(16) float[4] A; 2745 _mm_store1_ps(A.ptr, _mm_set_ss(42.0f)); 2746 float[4] correct = [42.0f, 42, 42, 42]; 2747 assert(A == correct); 2748 } 2749 2750 /// Store the upper 2 single-precision (32-bit) floating-point elements from `a` into memory. 2751 void _mm_storeh_pi(__m64* p, __m128 a) pure @trusted 2752 { 2753 pragma(inline, true); 2754 long2 la = cast(long2)a; 2755 (*p).ptr[0] = la.array[1]; 2756 } 2757 unittest 2758 { 2759 __m64 R = _mm_setzero_si64(); 2760 long2 A = [13, 25]; 2761 _mm_storeh_pi(&R, cast(__m128)A); 2762 assert(R.array[0] == 25); 2763 } 2764 2765 /// Store the lower 2 single-precision (32-bit) floating-point elements from `a` into memory. 2766 void _mm_storel_pi(__m64* p, __m128 a) pure @trusted 2767 { 2768 pragma(inline, true); 2769 long2 la = cast(long2)a; 2770 (*p).ptr[0] = la.array[0]; 2771 } 2772 unittest 2773 { 2774 __m64 R = _mm_setzero_si64(); 2775 long2 A = [13, 25]; 2776 _mm_storel_pi(&R, cast(__m128)A); 2777 assert(R.array[0] == 13); 2778 } 2779 2780 /// Store 4 single-precision (32-bit) floating-point elements from `a` into memory in reverse order. 2781 /// `mem_addr` must be aligned on a 16-byte boundary or a general-protection exception may be generated. 2782 void _mm_storer_ps(float* mem_addr, __m128 a) pure @trusted // FUTURE should not be trusted 2783 { 2784 __m128* aligned = cast(__m128*)mem_addr; 2785 static if (DMD_with_DSIMD) 2786 { 2787 __m128 r = cast(__m128) __simd(XMM.SHUFPS, a, a, 27); 2788 } 2789 else 2790 { 2791 __m128 r; // PERF =void; 2792 r.ptr[0] = a.array[3]; 2793 r.ptr[1] = a.array[2]; 2794 r.ptr[2] = a.array[1]; 2795 r.ptr[3] = a.array[0]; 2796 } 2797 *aligned = r; 2798 } 2799 unittest 2800 { 2801 align(16) float[4] A; 2802 _mm_storer_ps(A.ptr, _mm_setr_ps(1.0f, 2, 3, 4)); 2803 float[4] correct = [4.0f, 3.0f, 2.0f, 1.0f]; 2804 assert(A == correct); 2805 } 2806 2807 /// Store 128-bits (composed of 4 packed single-precision (32-bit) floating-point elements) from `a` into memory. 2808 /// `mem_addr` does not need to be aligned on any particular boundary. 2809 void _mm_storeu_ps(float* mem_addr, __m128 a) pure @trusted // FUTURE should not be trusted, see #62 2810 { 2811 pragma(inline, true); 2812 static if (DMD_with_DSIMD) 2813 { 2814 cast(void) __simd_sto(XMM.STOUPS, *cast(void16*)(cast(float*)mem_addr), a); 2815 } 2816 else static if (GDC_with_SSE) 2817 { 2818 __builtin_ia32_storeups(mem_addr, a); // better in -O0 2819 } 2820 else static if (LDC_with_optimizations) 2821 { 2822 storeUnaligned!(float4)(a, mem_addr); 2823 } 2824 else 2825 { 2826 mem_addr[0] = a.array[0]; 2827 mem_addr[1] = a.array[1]; 2828 mem_addr[2] = a.array[2]; 2829 mem_addr[3] = a.array[3]; 2830 } 2831 } 2832 unittest 2833 { 2834 __m128 A = _mm_setr_ps(1.0f, 2, 3, 4); 2835 align(16) float[6] R = [0.0f, 0, 0, 0, 0, 0]; 2836 float[4] correct = [1.0f, 2, 3, 4]; 2837 _mm_storeu_ps(&R[1], A); 2838 assert(R[1..5] == correct); 2839 } 2840 2841 /// Store 64-bits of integer data from `a` into memory using a non-temporal memory hint. 2842 /// Note: non-temporal stores should be followed by `_mm_sfence()` for reader threads. 2843 void _mm_stream_pi (__m64* mem_addr, __m64 a) pure @trusted 2844 { 2845 _mm_stream_si64(cast(long*)mem_addr, a.array[0]); 2846 } 2847 2848 /// Store 128-bits (composed of 4 packed single-precision (32-bit) floating-point elements) from 2849 /// `a`s into memory using a non-temporal memory hint. `mem_addr` must be aligned on a 16-byte 2850 /// boundary or a general-protection exception may be generated. 2851 /// Note: non-temporal stores should be followed by `_mm_sfence()` for reader threads. 2852 void _mm_stream_ps (float* mem_addr, __m128 a) 2853 { 2854 // TODO report this bug: DMD generates no stream instruction when using D_SIMD 2855 static if (GDC_with_SSE) 2856 { 2857 return __builtin_ia32_movntps(mem_addr, a); 2858 } 2859 else static if (LDC_with_InlineIREx && LDC_with_optimizations) 2860 { 2861 enum prefix = `!0 = !{ i32 1 }`; 2862 enum ir = ` 2863 store <4 x float> %1, <4 x float>* %0, align 16, !nontemporal !0 2864 ret void`; 2865 LDCInlineIREx!(prefix, ir, "", void, __m128*, float4)(cast(__m128*)mem_addr, a); 2866 2867 } 2868 else 2869 { 2870 // Regular store instead. 2871 __m128* dest = cast(__m128*)mem_addr; 2872 *dest = a; // it's a regular move instead 2873 } 2874 } 2875 unittest 2876 { 2877 align(16) float[4] A; 2878 _mm_stream_ps(A.ptr, _mm_set1_ps(78.0f)); 2879 assert(A[0] == 78.0f && A[1] == 78.0f && A[2] == 78.0f && A[3] == 78.0f); 2880 } 2881 2882 /// Subtract packed single-precision (32-bit) floating-point elements in `b` from packed single-precision (32-bit) 2883 /// floating-point elements in `a`. 2884 __m128 _mm_sub_ps(__m128 a, __m128 b) pure @safe 2885 { 2886 pragma(inline, true); 2887 return a - b; 2888 } 2889 unittest 2890 { 2891 __m128 a = [1.5f, -2.0f, 3.0f, 1.0f]; 2892 a = _mm_sub_ps(a, a); 2893 float[4] correct = [0.0f, 0.0f, 0.0f, 0.0f]; 2894 assert(a.array == correct); 2895 } 2896 2897 /// Subtract the lower single-precision (32-bit) floating-point element in `b` from the lower single-precision (32-bit) 2898 /// floating-point element in `a`, store the subtration result in the lower element of result, and copy the upper 3 2899 /// packed elements from a to the upper elements of result. 2900 __m128 _mm_sub_ss(__m128 a, __m128 b) pure @safe 2901 { 2902 static if (DMD_with_DSIMD) 2903 return cast(__m128) __simd(XMM.SUBSS, a, b); 2904 else static if (GDC_with_SSE) 2905 return __builtin_ia32_subss(a, b); 2906 else 2907 { 2908 a[0] -= b[0]; 2909 return a; 2910 } 2911 } 2912 unittest 2913 { 2914 __m128 a = [1.5f, -2.0f, 3.0f, 1.0f]; 2915 a = _mm_sub_ss(a, a); 2916 float[4] correct = [0.0f, -2.0, 3.0f, 1.0f]; 2917 assert(a.array == correct); 2918 } 2919 2920 /// Transpose the 4x4 matrix formed by the 4 rows of single-precision (32-bit) floating-point elements in row0, row1, 2921 /// row2, and row3, and store the transposed matrix in these vectors (row0 now contains column 0, etc.). 2922 void _MM_TRANSPOSE4_PS (ref __m128 row0, ref __m128 row1, ref __m128 row2, ref __m128 row3) pure @safe 2923 { 2924 __m128 tmp3, tmp2, tmp1, tmp0; 2925 tmp0 = _mm_unpacklo_ps(row0, row1); 2926 tmp2 = _mm_unpacklo_ps(row2, row3); 2927 tmp1 = _mm_unpackhi_ps(row0, row1); 2928 tmp3 = _mm_unpackhi_ps(row2, row3); 2929 row0 = _mm_movelh_ps(tmp0, tmp2); 2930 row1 = _mm_movehl_ps(tmp2, tmp0); 2931 row2 = _mm_movelh_ps(tmp1, tmp3); 2932 row3 = _mm_movehl_ps(tmp3, tmp1); 2933 } 2934 unittest 2935 { 2936 __m128 l0 = _mm_setr_ps(0, 1, 2, 3); 2937 __m128 l1 = _mm_setr_ps(4, 5, 6, 7); 2938 __m128 l2 = _mm_setr_ps(8, 9, 10, 11); 2939 __m128 l3 = _mm_setr_ps(12, 13, 14, 15); 2940 _MM_TRANSPOSE4_PS(l0, l1, l2, l3); 2941 float[4] r0 = [0.0f, 4, 8, 12]; 2942 float[4] r1 = [1.0f, 5, 9, 13]; 2943 float[4] r2 = [2.0f, 6, 10, 14]; 2944 float[4] r3 = [3.0f, 7, 11, 15]; 2945 assert(l0.array == r0); 2946 assert(l1.array == r1); 2947 assert(l2.array == r2); 2948 assert(l3.array == r3); 2949 } 2950 2951 // Note: the only difference between these intrinsics is the signalling 2952 // behaviour of quiet NaNs. This is incorrect but the case where 2953 // you would want to differentiate between qNaN and sNaN and then 2954 // treat them differently on purpose seems extremely rare. 2955 alias _mm_ucomieq_ss = _mm_comieq_ss; 2956 alias _mm_ucomige_ss = _mm_comige_ss; 2957 alias _mm_ucomigt_ss = _mm_comigt_ss; 2958 alias _mm_ucomile_ss = _mm_comile_ss; 2959 alias _mm_ucomilt_ss = _mm_comilt_ss; 2960 alias _mm_ucomineq_ss = _mm_comineq_ss; 2961 2962 /// Return vector of type `__m128` with undefined elements. 2963 __m128 _mm_undefined_ps() pure @safe 2964 { 2965 pragma(inline, true); 2966 __m128 undef = void; 2967 return undef; 2968 } 2969 2970 /// Unpack and interleave single-precision (32-bit) floating-point elements from the high half `a` and `b`. 2971 __m128 _mm_unpackhi_ps (__m128 a, __m128 b) pure @trusted 2972 { 2973 // PERF GDC use intrinsic 2974 static if (DMD_with_DSIMD) 2975 { 2976 return cast(__m128) __simd(XMM.UNPCKHPS, a, b); 2977 } 2978 else static if (LDC_with_optimizations) 2979 { 2980 enum ir = `%r = shufflevector <4 x float> %0, <4 x float> %1, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2981 ret <4 x float> %r`; 2982 return LDCInlineIR!(ir, float4, float4, float4)(a, b); 2983 } 2984 else 2985 { 2986 __m128 r; // PERF =void; 2987 r.ptr[0] = a.array[2]; 2988 r.ptr[1] = b.array[2]; 2989 r.ptr[2] = a.array[3]; 2990 r.ptr[3] = b.array[3]; 2991 return r; 2992 } 2993 } 2994 unittest 2995 { 2996 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, 4.0f); 2997 __m128 B = _mm_setr_ps(5.0f, 6.0f, 7.0f, 8.0f); 2998 __m128 R = _mm_unpackhi_ps(A, B); 2999 float[4] correct = [3.0f, 7.0f, 4.0f, 8.0f]; 3000 assert(R.array == correct); 3001 } 3002 3003 /// Unpack and interleave single-precision (32-bit) floating-point elements from the low half of `a` and `b`. 3004 __m128 _mm_unpacklo_ps (__m128 a, __m128 b) pure @trusted 3005 { 3006 // PERF GDC use intrinsic 3007 static if (DMD_with_DSIMD) 3008 { 3009 return cast(__m128) __simd(XMM.UNPCKLPS, a, b); 3010 } 3011 else static if (LDC_with_optimizations) 3012 { 3013 enum ir = `%r = shufflevector <4 x float> %0, <4 x float> %1, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 3014 ret <4 x float> %r`; 3015 return LDCInlineIR!(ir, float4, float4, float4)(a, b); 3016 } 3017 else 3018 { 3019 __m128 r; // PERF =void; 3020 r.ptr[0] = a.array[0]; 3021 r.ptr[1] = b.array[0]; 3022 r.ptr[2] = a.array[1]; 3023 r.ptr[3] = b.array[1]; 3024 return r; 3025 } 3026 } 3027 unittest 3028 { 3029 __m128 A = _mm_setr_ps(1.0f, 2.0f, 3.0f, 4.0f); 3030 __m128 B = _mm_setr_ps(5.0f, 6.0f, 7.0f, 8.0f); 3031 __m128 R = _mm_unpacklo_ps(A, B); 3032 float[4] correct = [1.0f, 5.0f, 2.0f, 6.0f]; 3033 assert(R.array == correct); 3034 } 3035 3036 /// Compute the bitwise XOR of packed single-precision (32-bit) floating-point elements in `a` and `b`. 3037 __m128 _mm_xor_ps (__m128 a, __m128 b) pure @safe 3038 { 3039 static if (DMD_with_DSIMD) 3040 { 3041 return cast(__m128) __simd(XMM.XORPS, cast(void16) a, cast(void16) b); 3042 } 3043 else 3044 { 3045 return cast(__m128)(cast(__m128i)a ^ cast(__m128i)b); 3046 } 3047 } 3048 unittest 3049 { 3050 __m128 A = cast(__m128) _mm_set1_epi32(0x80000000); 3051 __m128 B = _mm_setr_ps(4.0f, -5.0, -9.5f, float.infinity); 3052 __m128 C = _mm_xor_ps(A, B); 3053 float[4] correct = [-4.0f, 5.0, 9.5f, -float.infinity]; 3054 assert(C.array == correct); 3055 } 3056 3057 private 3058 { 3059 // Returns: `true` if the pointer is suitably aligned. 3060 bool isPointerAligned(void* p, size_t alignment) pure 3061 { 3062 assert(alignment != 0); 3063 return ( cast(size_t)p & (alignment - 1) ) == 0; 3064 } 3065 3066 // Returns: next pointer aligned with alignment bytes. 3067 void* nextAlignedPointer(void* start, size_t alignment) pure 3068 { 3069 return cast(void*)nextMultipleOf(cast(size_t)(start), alignment); 3070 } 3071 3072 // Returns number of bytes to actually allocate when asking 3073 // for a particular alignment 3074 @nogc size_t requestedSize(size_t askedSize, size_t alignment) pure 3075 { 3076 enum size_t pointerSize = size_t.sizeof; 3077 return askedSize + alignment - 1 + pointerSize * 3; 3078 } 3079 3080 // Store pointer given by malloc + size + alignment 3081 @nogc void* storeRawPointerPlusInfo(void* raw, size_t size, size_t alignment) pure 3082 { 3083 enum size_t pointerSize = size_t.sizeof; 3084 char* start = cast(char*)raw + pointerSize * 3; 3085 void* aligned = nextAlignedPointer(start, alignment); 3086 void** rawLocation = cast(void**)(cast(char*)aligned - pointerSize); 3087 *rawLocation = raw; 3088 size_t* sizeLocation = cast(size_t*)(cast(char*)aligned - 2 * pointerSize); 3089 *sizeLocation = size; 3090 size_t* alignmentLocation = cast(size_t*)(cast(char*)aligned - 3 * pointerSize); 3091 *alignmentLocation = alignment; 3092 assert( isPointerAligned(aligned, alignment) ); 3093 return aligned; 3094 } 3095 3096 // Returns: x, multiple of powerOfTwo, so that x >= n. 3097 @nogc size_t nextMultipleOf(size_t n, size_t powerOfTwo) pure nothrow 3098 { 3099 // check power-of-two 3100 assert( (powerOfTwo != 0) && ((powerOfTwo & (powerOfTwo - 1)) == 0)); 3101 3102 size_t mask = ~(powerOfTwo - 1); 3103 return (n + powerOfTwo - 1) & mask; 3104 } 3105 3106 void* alignedReallocImpl(bool PreserveDataIfResized)(void* aligned, size_t size, size_t alignment) 3107 { 3108 // Calling `_mm_realloc`, `_mm_realloc_discard` or `realloc` with size 0 is 3109 // Undefined Behavior, and not only since C23. 3110 // Moreover, alignedReallocImpl was buggy about it. 3111 assert(size != 0); 3112 3113 if (aligned is null) 3114 return _mm_malloc(size, alignment); 3115 3116 assert(alignment != 0); 3117 assert(isPointerAligned(aligned, alignment)); 3118 3119 size_t previousSize = *cast(size_t*)(cast(char*)aligned - size_t.sizeof * 2); 3120 size_t prevAlignment = *cast(size_t*)(cast(char*)aligned - size_t.sizeof * 3); 3121 3122 // It is illegal to change the alignment across calls. 3123 assert(prevAlignment == alignment); 3124 3125 void* raw = *cast(void**)(cast(char*)aligned - size_t.sizeof); 3126 size_t request = requestedSize(size, alignment); 3127 size_t previousRequest = requestedSize(previousSize, alignment); 3128 assert(previousRequest - request == previousSize - size); 3129 3130 // Heuristic: if a requested size is within 50% to 100% of what is already allocated 3131 // then exit with the same pointer 3132 // PERF it seems like `realloc` should do that, not us. 3133 if ( (previousRequest < request * 4) && (request <= previousRequest) ) 3134 return aligned; 3135 3136 void* newRaw = malloc(request); 3137 if (request > 0 && newRaw == null) // realloc(0) can validly return anything 3138 onOutOfMemoryError(); 3139 3140 void* newAligned = storeRawPointerPlusInfo(newRaw, size, alignment); 3141 3142 static if (PreserveDataIfResized) 3143 { 3144 size_t minSize = size < previousSize ? size : previousSize; 3145 memcpy(newAligned, aligned, minSize); // ok to use memcpy: newAligned is into new memory, always different from aligned 3146 } 3147 3148 // Free previous data 3149 _mm_free(aligned); 3150 assert(isPointerAligned(newAligned, alignment)); 3151 return newAligned; 3152 } 3153 } 3154 3155 unittest 3156 { 3157 assert(nextMultipleOf(0, 4) == 0); 3158 assert(nextMultipleOf(1, 4) == 4); 3159 assert(nextMultipleOf(2, 4) == 4); 3160 assert(nextMultipleOf(3, 4) == 4); 3161 assert(nextMultipleOf(4, 4) == 4); 3162 assert(nextMultipleOf(5, 4) == 8); 3163 3164 { 3165 void* p = _mm_malloc(23, 16); 3166 assert(p !is null); 3167 assert(((cast(size_t)p) & 0xf) == 0); 3168 _mm_free(p); 3169 } 3170 3171 void* nullAlloc = _mm_malloc(0, 32); 3172 assert(nullAlloc != null); 3173 _mm_free(nullAlloc); 3174 } 3175 3176 unittest 3177 { 3178 // In C23, it is UB to call realloc with 0 size. 3179 // Ensure this is not the case, ever. 3180 3181 int alignment = 1; 3182 void* alloc = _mm_malloc(18, alignment); 3183 3184 // DO NOT DO THAT: 3185 //_mm_realloc(alloc, 0, alignment); 3186 3187 // DO THAT: 3188 _mm_free(alloc); 3189 } 3190 3191 3192 // For some reason, order of declaration is important for this one 3193 // so it is misplaced. 3194 // Note: is just another name for _mm_cvtss_si32 3195 alias _mm_cvt_ss2si = _mm_cvtss_si32;