The OpenD Programming Language

cudaDeviceProp

derelict cuda runtimeapi

CUDA device properties

struct cudaDeviceProp {
char[256] name;
cudaUUID_t uuid;
char[8] luid;
uint luidDeviceNodeMask;
size_t totalGlobalMem;
size_t sharedMemPerBlock;
int regsPerBlock;
int warpSize;
size_t memPitch;
int maxThreadsPerBlock;
int[3] maxThreadsDim;
int[3] maxGridSize;
int clockRate;
size_t totalConstMem;
int major;
int minor;
size_t textureAlignment;
size_t texturePitchAlignment;
int deviceOverlap;
int multiProcessorCount;
int kernelExecTimeoutEnabled;
int integrated;
int canMapHostMemory;
int computeMode;
int maxTexture1D;
int maxTexture1DMipmap;
int maxTexture1DLinear;
int[2] maxTexture2D;
int[2] maxTexture2DMipmap;
int[3] maxTexture2DLinear;
int[2] maxTexture2DGather;
int[3] maxTexture3D;
int[3] maxTexture3DAlt;
int maxTextureCubemap;
int[2] maxTexture1DLayered;
int[3] maxTexture2DLayered;
int[2] maxTextureCubemapLayered;
int maxSurface1D;
int[2] maxSurface2D;
int[3] maxSurface3D;
int[2] maxSurface1DLayered;
int[3] maxSurface2DLayered;
int maxSurfaceCubemap;
int[2] maxSurfaceCubemapLayered;
size_t surfaceAlignment;
int concurrentKernels;
int ECCEnabled;
int pciBusID;
int pciDeviceID;
int pciDomainID;
int tccDriver;
int asyncEngineCount;
int unifiedAddressing;
int memoryClockRate;
int memoryBusWidth;
int l2CacheSize;
int maxThreadsPerMultiProcessor;
int streamPrioritiesSupported;
int globalL1CacheSupported;
int localL1CacheSupported;
size_t sharedMemPerMultiprocessor;
int regsPerMultiprocessor;
int managedMemory;
int isMultiGpuBoard;
int multiGpuBoardGroupID;
int hostNativeAtomicSupported;
int singleToDoublePrecisionPerfRatio;
int pageableMemoryAccess;
int concurrentManagedAccess;
int computePreemptionSupported;
int canUseHostPointerForRegisteredMem;
int cooperativeLaunch;
int cooperativeMultiDeviceLaunch;
size_t sharedMemPerBlockOptin;
int pageableMemoryAccessUsesHostPageTables;
int directManagedMemAccessFromHost;
}

Members

Variables

ECCEnabled
int ECCEnabled;

< Device has ECC support enabled

asyncEngineCount
int asyncEngineCount;

< Number of asynchronous engines

canMapHostMemory
int canMapHostMemory;

< Device can map host memory with cudaHostAlloc/cudaHostGetDevicePointer

canUseHostPointerForRegisteredMem
int canUseHostPointerForRegisteredMem;

< Device can access host registered memory at the same virtual address as the CPU

clockRate
int clockRate;

< Clock frequency in kilohertz

computeMode
int computeMode;

< Compute mode (See ::cudaComputeMode)

computePreemptionSupported
int computePreemptionSupported;

< Device supports Compute Preemption

concurrentKernels
int concurrentKernels;

< Device can possibly execute multiple kernels concurrently

concurrentManagedAccess
int concurrentManagedAccess;

< Device can coherently access managed memory concurrently with the CPU

cooperativeLaunch
int cooperativeLaunch;

< Device supports launching cooperative kernels via ::cudaLaunchCooperativeKernel

cooperativeMultiDeviceLaunch
int cooperativeMultiDeviceLaunch;

< Device can participate in cooperative kernels launched via ::cudaLaunchCooperativeKernelMultiDevice

deviceOverlap
int deviceOverlap;

< Device can concurrently copy memory and execute a kernel. Deprecated. Use instead asyncEngineCount.

directManagedMemAccessFromHost
int directManagedMemAccessFromHost;

< Host can directly access managed memory on the device without migration.

globalL1CacheSupported
int globalL1CacheSupported;

< Device supports caching globals in L1

hostNativeAtomicSupported
int hostNativeAtomicSupported;

< Link between the device and the host supports native atomic operations

integrated
int integrated;

< Device is integrated as opposed to discrete

isMultiGpuBoard
int isMultiGpuBoard;

< Device is on a multi-GPU board

kernelExecTimeoutEnabled
int kernelExecTimeoutEnabled;

< Specified whether there is a run time limit on kernels

l2CacheSize
int l2CacheSize;

< Size of L2 cache in bytes

localL1CacheSupported
int localL1CacheSupported;

< Device supports caching locals in L1

luid
char[8] luid;

< 8-byte locally unique identifier. Value is undefined on TCC and non-Windows platforms

luidDeviceNodeMask
uint luidDeviceNodeMask;

< LUID device node mask. Value is undefined on TCC and non-Windows platforms

major
int major;

< Major compute capability

managedMemory
int managedMemory;

< Device supports allocating managed memory on this system

maxGridSize
int[3] maxGridSize;

< Maximum size of each dimension of a grid

maxSurface1D
int maxSurface1D;

< Maximum 1D surface size

maxSurface1DLayered
int[2] maxSurface1DLayered;

< Maximum 1D layered surface dimensions

maxSurface2D
int[2] maxSurface2D;

< Maximum 2D surface dimensions

maxSurface2DLayered
int[3] maxSurface2DLayered;

< Maximum 2D layered surface dimensions

maxSurface3D
int[3] maxSurface3D;

< Maximum 3D surface dimensions

maxSurfaceCubemap
int maxSurfaceCubemap;

< Maximum Cubemap surface dimensions

maxSurfaceCubemapLayered
int[2] maxSurfaceCubemapLayered;

< Maximum Cubemap layered surface dimensions

maxTexture1D
int maxTexture1D;

< Maximum 1D texture size

maxTexture1DLayered
int[2] maxTexture1DLayered;

< Maximum 1D layered texture dimensions

maxTexture1DLinear
int maxTexture1DLinear;

< Maximum size for 1D textures bound to linear memory

maxTexture1DMipmap
int maxTexture1DMipmap;

< Maximum 1D mipmapped texture size

maxTexture2D
int[2] maxTexture2D;

< Maximum 2D texture dimensions

maxTexture2DGather
int[2] maxTexture2DGather;

< Maximum 2D texture dimensions if texture gather operations have to be performed

maxTexture2DLayered
int[3] maxTexture2DLayered;

< Maximum 2D layered texture dimensions

maxTexture2DLinear
int[3] maxTexture2DLinear;

< Maximum dimensions (width, height, pitch) for 2D textures bound to pitched memory

maxTexture2DMipmap
int[2] maxTexture2DMipmap;

< Maximum 2D mipmapped texture dimensions

maxTexture3D
int[3] maxTexture3D;

< Maximum 3D texture dimensions

maxTexture3DAlt
int[3] maxTexture3DAlt;

< Maximum alternate 3D texture dimensions

maxTextureCubemap
int maxTextureCubemap;

< Maximum Cubemap texture dimensions

maxTextureCubemapLayered
int[2] maxTextureCubemapLayered;

< Maximum Cubemap layered texture dimensions

maxThreadsDim
int[3] maxThreadsDim;

< Maximum size of each dimension of a block

maxThreadsPerBlock
int maxThreadsPerBlock;

< Maximum number of threads per block

maxThreadsPerMultiProcessor
int maxThreadsPerMultiProcessor;

< Maximum resident threads per multiprocessor

memPitch
size_t memPitch;

< Maximum pitch in bytes allowed by memory copies

memoryBusWidth
int memoryBusWidth;

< Global memory bus width in bits

memoryClockRate
int memoryClockRate;

< Peak memory clock frequency in kilohertz

minor
int minor;

< Minor compute capability

multiGpuBoardGroupID
int multiGpuBoardGroupID;

< Unique identifier for a group of devices on the same multi-GPU board

multiProcessorCount
int multiProcessorCount;

< Number of multiprocessors on device

name
char[256] name;

< ASCII string identifying device

pageableMemoryAccess
int pageableMemoryAccess;

< Device supports coherently accessing pageable memory without calling cudaHostRegister on it

pageableMemoryAccessUsesHostPageTables
int pageableMemoryAccessUsesHostPageTables;

< Device accesses pageable memory via the host's page tables

pciBusID
int pciBusID;

< PCI bus ID of the device

pciDeviceID
int pciDeviceID;

< PCI device ID of the device

pciDomainID
int pciDomainID;

< PCI domain ID of the device

regsPerBlock
int regsPerBlock;

< 32-bit registers available per block

regsPerMultiprocessor
int regsPerMultiprocessor;

< 32-bit registers available per multiprocessor

sharedMemPerBlock
size_t sharedMemPerBlock;

< Shared memory available per block in bytes

sharedMemPerBlockOptin
size_t sharedMemPerBlockOptin;

< Per device maximum shared memory per block usable by special opt in

sharedMemPerMultiprocessor
size_t sharedMemPerMultiprocessor;

< Shared memory available per multiprocessor in bytes

singleToDoublePrecisionPerfRatio
int singleToDoublePrecisionPerfRatio;

< Ratio of single precision performance (in floating-point operations per second) to double precision performance

streamPrioritiesSupported
int streamPrioritiesSupported;

< Device supports stream priorities

surfaceAlignment
size_t surfaceAlignment;

< Alignment requirements for surfaces

tccDriver
int tccDriver;

< 1 if device is a Tesla device using TCC driver, 0 otherwise

textureAlignment
size_t textureAlignment;

< Alignment requirement for textures

texturePitchAlignment
size_t texturePitchAlignment;

< Pitch alignment requirement for texture references bound to pitched memory

totalConstMem
size_t totalConstMem;

< Constant memory available on device in bytes

totalGlobalMem
size_t totalGlobalMem;

< Global memory available on device in bytes

unifiedAddressing
int unifiedAddressing;

< Device shares a unified address space with the host

uuid
cudaUUID_t uuid;

< 16-byte unique identifier

warpSize
int warpSize;

< Warp size in threads

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Source

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